Conference
S. Sanjeet and B. D. Sahoo, "High Accuracy RF Modulation Recognition using Low-Dimensional Encoder-based SNN", submitted to IEEE International Symposium on Circuits and Systems (ISCAS).
S. Deb, P. K. Biswas, and B. D. Sahoo, "Analog Image Compression: The Quest for Optimal Transforms", submitted to IEEE International Symposium on Circuits and Systems (ISCAS).
Sree Kumar R. G., V. K. Surya, N. Wary, and B. D. Sahoo, "A Hybrid SST-CML Full Duplex Simultaneous Bi-Directional Signaling Link", submitted to IEEE International Symposium on Circuits and Systems (ISCAS).
Aswani A. R., A. James, B. D. Sahoo, "Hardware-Software Co-Design of Super-resolution Memristive Crossbar Based SNN", submitted to IEEE International Symposium on Circuits and Systems (ISCAS).
A. Yadav, V. K. Surya, Sree Kumar R. G., B. D. Sahoo, and N. Wary,"Energy Efficient Voltage-Mode Simultaneous Bidirectional Transceiver for Serial Links", submitted to IEEE International Symposium on Circuits and Systems (ISCAS).
P. Kumar, V. K. Surya, Sree Kumar R. G., B. D. Sahoo, and N. Wary,"A Replica Driverless Common/Differential Mode Hybrid for Full-Duplex Signaling in Serial Links", submitted to IEEE International Symposium on Circuits and Systems (ISCAS).
S. Bakshi, V. K. Surya, B. D. Sahoo, and N. Wary, "An Echo-Cancellation Hybrid Transceiver for Full-Duplex Signaling in 3D-Stacked ICs", submitted to IEEE International Symposium on Circuits and Systems (ISCAS).
K. Yoshioka, P. Allred, T. Barton, B. D. Sahoo, Y.-C. Kuan, S. Wood Chiang, and H. Tamukoh, "Reservoir Computing with VCO-Based Spiking Neurons for Regression and Classification", submitted to IEEE International Symposium on Circuits and Systems (ISCAS).
S. Sanjeet, S. Das, M. Fujita, and B. D. Sahoo, “Systematic Design of Ring VCO-Based SNN - Translating Training Parameters to Circuits”, accepted 67th Intl. Midwest Symp. on Circuits and Systems, Aug. 2024.
R. S. Peerla and B. D. Sahoo, “Extended Range Divider for Multi Band Phase Locked Loop”, accepted 67th Intl. Midwest Symp. on Circuits and Systems, Aug. 2024.
S. Das and B. D. Sahoo, “Closed Form Expression of Input Matching of a Wideband Single-Ended to Differential LNA”, 37th Intl. Conf. on VLSI Design, Kolkata, India, Jan. 2024.
Sai Sanjeet, Sannidhi Boppana, B. Sahoo, and Masahiro Fujita, "Noise Resilience of Reduced Precision Neural Networks", The Intl. Symp. on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), June, 2023, Kusatsu, Japan. https://doi.org/10.1145/3597031.3597058
N. Patle and B. Sahoo, “Novel Switched Capacitor DC-DC Converter Achieving Highest Rational Conversion Ratios Using Inter-Stage Feedback”, Proc. 2023 IEEE 24th Workshop on Control and Modeling for Power Electronics, Ann Arbor, MI, June 2023.
Kousik Das, Senorita Deb, and B. Sahoo, “A Low Power Cyclic ADC Architecture using Reference Scaling Technique”, Proc. 2023 IEEE Intl. Symp. on Circuits and Systems (ISCAS), Monterey, CA, May 2023.
Sai Sanjeet, R. Meena, B. Sahoo, K. K. Parhi, and M. Fujita, “IIR Filter Based Spiking Neural Network”, Proc. 2023 IEEE Intl. Symp. on Circuits and Systems (ISCAS), Monterey, CA, May 2023.
R. S. Peerla, P. Chary, B. Sahoo, A. Dutta, “A Dual VCO Based L5/S Band PLL with Extended Range Divider for IRNSS Application”, IEEE Intl. Symp. on Circuits and Systems, Austin, USA, pp. 1699-1703, May 2022.
Sai Sanjeet, B. Sahoo, K. K. Parhi, “Comparison of Real-Valued FFT Architectures for Low-Throughput Applications using FPGA”, 64th Intl. Midwest Symp. on Circuits and Systems, pp. 112-115, Aug. 2021.
N. Patle, P. Jawalikar, and B. Sahoo, “Time Domain Modeling of Switched-Capacitor Converters with Periodic Inputs”, IEEE Intl. Conf. on Circuits and Systems (ISCAS), Oct. 2020, Seville, Spain.
Harshit Roy, Arkaprova Ray, and B. Sahoo, “Deterministic Dither Based Mismatch Characterization of Wide Range of Metal-Oxide-Metal Capacitors”, 63rd Intl. Midwest Symp. on Circuits and Systems, pp. 880-884, Sept. 2020.
M. Palaria, S. Sanjeet, B. Sahoo, and M. Fujita, “Adder-Only Convolutional Neural Network with Binary Input Image”, 62nd Intl. Midwest Symp. on Circuits and Systems, pp. 319-322, Aug. 2019.
Alok Keshattiwar and B. Sahoo, “A Systematic Approach to Sizing Capacitors in Split-SAR ADC to Achieve Optimum Redundancy”, 62nd Intl. Midwest Symp. on Circuits and Systems, pp. 117-120, Aug. 2019.
R. K. Mothukuru, Manish Kumar, and B. Sahoo, “A Curvature Compensated Bandgap Circuit Exploiting Temperature Dependence of β”, 62nd Intl. Midwest Symp. on Circuits and Systems, pp. 509-512, Aug. 2019.
Rishabh Govli, Vivek Dixit, B. Sahoo, “1-Transistor 1-Memristor Multilevel Memory Cell”, IEEE 61st Intl. Midwest Symp. on Circuits and Systems, pp. 508-511, Aug. 2018.
Nagaveni S, B. Sahoo, Ashudeb Dutta, “Wide Input Range Single Feed RF Energy Harvester”, IEEE 16th International New Circuits and Systems Conf., Montreal, Canada, pp. 144-147, 2018.
Diego James, Abishek T. K., A. Purushothaman, B. Sahoo, “Mitigating Aperture Error in Pipelined ADCs Without a Front-end Sample-and-Hold Amplifier”, 31st Intl. Conf. on VLSI Design, Pune, India, Jan. 2018.
C. Radhakrishnan and B. Sahoo, “A Nyquist-rate VCO Based ADC with ”, 60th IEEE International Midwest Symposium on Circuits and Systems, Boston, USA, pp. 1021-1024, Aug. 2017.
A. Shah and B. Sahoo, “An 8b 5-GS/s CMOS SAR ADC with Speed Optimized SAR Logic”, 60th IEEE Intl Midwest Symp. on Circuits and Systems, Boston, USA, pp. 1465-1468, Aug. 2017.
Braedon Salz, B. Sahoo, P. K. Hanumolu, et. al., “A 0.7 V Digital Differential Inductor for On-Chip Filter Applications in 65-nm CMOS”, IEEE Custom Integrated Circuits Conf., Austin, Apr. 2017.
J. Zhu, M. Mahalley, G. Shu, W-S. Choi, R. Nandwana, A. Elkholy, B. Sahoo, and P. K. Hanumolu, “A 45-75MHz 197-452µW Oscillator with 164.6dB FoM and 2.3psrms Period Jitter in 65nm CMOS”, IEEE Custom Integrated Circuits Conference, Austin, USA, April 2017.
B. Sahoo, “Ring Oscillator Based Sub-1V Leaky Integrate-and-Fire Neuron Circuit”, IEEE International Symposium on Circuits and Systems, Baltimore, USA, May 2017.
C. Ravi, D. James, V. Sarma, B. Sahoo, and A. Inamdar, “Thermal Noise Canceling Pipelined ADC”, IEEE International Symposium on Circuits and Systems, Baltimore, USA, May 2017.
Rahul T., V. B. Vulligaddala, and B. Sahoo, “CMOS Mixed Signal SoC for Low-Side Current Sensing”, IEEE International Symposium on Circuits and Systems, Baltimore, USA, May 2017.
Rahul T., B. Sahoo, and V. Vulligadala, “Bootstrapped Leakage Suppression Switch for Switched Capacitor Circuits Processing Signals with Zero Common Mode”, 59th IEEE Intl. Midwest Symp. on Circuits and Systems, Abu Dhabi, Oct. 2016.
Nevin A. Jacob, Diego James, and B. Sahoo, “Full-rate Switched Capacitor Multi-tap DFE For Long-Tail Post-cursor Cancellation”, 59th IEEE Intl. Midwest Symp. on Circuits and Systems, Abu Dhabi, Oct. 2016.
Abishek T. K. and B. Sahoo, “A Digitally Assisted Radiation Hardened Current Steering Digital-to-Analog Converter”, 29th International Conference on VLSI Design, Kolkata, India, Jan. 2016, pp. 559-560.
C. Ravi, V. Sarma, B. Sahoo, “At Speed Digital Gain Error Calibration of Pipelined ADCs”, IEEE 13th International New Circuits and Systems Conf., Grenoble, France, pp. 1-4, June 2015
Rahul T., B. Sahoo, Arya, S., Parvathy, S.J., and Vulligaddala, V.B.“A Wide Dynamic-Range Low-Power Signal Conditioning Circuit for Low-Side Current Sensing Application”, 28th International Conference on VLSI Design, Bengaluru, India, pp. 265-270, 3rd–7th Jan. 2015.
B. Sahoo, “An Overview of Digital Calibration Techniques for Pipelined ADCs, 57th IEEE Intl. Midwest Symp. on Circuits and Systems, College Station, USA, pp. 1061-1064, Aug. 2014.
N. A. Jacob, V. Choudhury and B. Sahoo, “A Multi-pole Single-tap IIR Based DFE Equalizer Topology”, IEEE 12th Intl. New Circuits and Systems Conf., Trois-Rivieres, Canada, June 2014.
C. Ravi, Rahul T., and B. Sahoo, “Histogram Based Deterministic Digital Background Calibration for Pipelined ADCs”, 27thInternational Conference on VLSI Design, Mumbai, India, pp. 569 – 574, Jan. 2014.
H. Wei, P. Zhang, B. Sahoo, and B. Razavi, “An 8-Bit 4-GS/s 120-mW CMOS ADC”, Proc. IEEE Custom Integrated Circuits Conference, Sept. 2013.
V. Sarma and B. Sahoo, “Error Feedback Based Noise Shaping in a Double sampled ADC”, IEEE 10th Intl. New Circuits and Systems Conf., Montreal, Canada, pp. 249-252, June 2012.
T. Rao, A. Dutta, S. G. Singh, A. De, B. Sahoo, “A Tuneable CMOS Pulse Generator for Detecting the Cracks in Concrete Walls”, IEEE Computer Society Annual Symposium on VLSI, pp. 126-160, 2012.
B. Sahoo and B. Razavi, “A 10-Bit 1-GHz 33-mW CMOS ADC”, IEEE International Symposium on VLSI Circuits, Honolulu, Hawaii, pp. 30-31, June 2012.
S. Roy, B. Sahoo, and S. Banerjee, “Radix Based Digital Calibration Technique for Pipelined ADC Using Nyquist Sampling of Sinusoid,” IEEE Intl. Symp. on Circuits and Systems, 2012.
B. Sahoo and B. Razavi, “A Fast Simulator for Pipelined A/D Converters”, Proceedings Midwest Symposium on Circuits and Systems, Cancun, Mexico, pp. 402-406, August 2009.
B. Sahoo and B. Razavi, “U-PAS: A User-Friendly ADC Simulator for Courses on Analog Design”, Intl. Conf. on Microelectronic Systems Education, San Francisco, pp. 77-80, July 2009.
B. Sahoo, M. Kuhlmann and Keshab K. Parhi, "A Low-Power Correlator", Proc. of 2000 Great Lakes Symposium on VLSI, Chicago, IL, pp. 153-155, March 2000.