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2022
2022
To be updated
2021
2021
To be updated
2020
2020
Book Chapter
[BC3] S. D. Shaikh and A. Basu, "Intelligent Intra-Cortical Brain-Machine Interfaces (i2BMI): Next generation of Scalable Neural Interfaces," Handbook of Biochips, Springer,, 2020.
[BC3] S. C. Liu, J. P. Strachan and A. Basu, "Analog Machine Learning Deep Network Circuits and Systems," Handbook on Proceedings of Workshop in Advances in Analog Circuit Design, Springer,, 2020.
[BC2] J. Acharya and A. Basu, "Neuromorphic Spiking Neural Network Algorithms," Chapter in Springer Handbook of Neuroengineering, edited by Nitish V. Thakor, 2020.
Journal
[J62] D. Singla, V. Mohan, T. Pulluri, A. Ussa, B. Ramesh and A. Basu "EBBINNOT: A Hardware Efficient Hybrid Event-Frame Tracker for Stationary Neuromorphic Vision Sensors," submitted, 2020.
[J61] A. Ussa, C. S. Rajen, D. Singla, J. Acharya, G. F. Chuanrong, A. Basu and B. Ramesh "A Hybrid Neuromorphic Object Tracking and Classification Framework for Real-time Systems," submitted, 2020.
[J60] R. A. John, N. Tiwari,.. C. Bartolozzi, *A. Basu and *N. Mathews , "Self-Healable Neuromorphic Memtransistor Elements for Decentralized Sensory Signal Processing in Robotics ," Nature Communications, accepted, 2020.
[J59] X. Zhang, V. Mohan and A. Basu, "CRAM: Collocated SRAM and DRAM with In-Memory Computing Based Denoising and Filling for Neuromorphic Vision Sensors in 65 nm CMOS" IEEE TCAS-II: Express Briefs accepted, 2020.(Invited from best papers in ISCAS 2020).
[J58] B. Kar, P. Gopalakrishnan, S. K. Bose, M. Roy and A. Basu, "ADIC: Anomaly Detection Integrated Circuit in 65nm CMOS utilizing Approximate Computing," submitted, 2020.
[J57] X. Zhang, J .Acharya and A. Basu, "A 0.63pJ/cycle Differential Ring Oscillator in 65nm CMOS for Robust Neurocomputing," submitted, 2020.
[J56] R. J. Abraham, J. Acharya, ... *A. Basu and *N. Mathews, "Optogenetics-Inspired Light-Driven 2D TMDC Computational Circuits Enable In-Memory Computing for Deep Recurrent Neural Networks ," submitted, 2020.
[J55] N. Shah, D. Chatterjee, D. Mukhopadhyay and A. Basu, "A Recurrent Neural Network Based PUF for Enhanced Machine Learning Attack Resistance," submitted, 2020.
Conference
[C78] Y. S. Won, S. Chatterjee, D. Jap, S. Bhasin and A. Basu, "'Time to Leak: Cross-Device Timing Attack On Edge Deep Learning Accelerator" IEEE ICEIC, Jeju, Korea, 2021.
[C77] X. Zhang, V. Mohan and A. Basu, "CRAM: Collocated SRAM and DRAM with In-Memory Computing Based Denoising and Filling for Neuromorphic Vision Sensors in 65 nm CMOS" IEEE ISCAS, Spain, 2020.(Invited to TCAS-II as one of the best papers in ISCAS 2020).
[C76] D. Singla, S. Chatterjee, L. Ramapantulu, A. Ussa, B. Ramesh and A. Basu, "HyNNA: Improved Performance for Neuromorphic Vision Sensor Based Surveillance Using Hybrid Neural Network Architecture" IEEE ISCAS, Spain, 2020.
[C75] S. D. Shaikh, R. So, T. Sibindi, C. Libedinsky and A. Basu, "Towards Autonomous Intra-Cortical Brain Machine Interfaces:Applying Bandit Algorithms for Online Reinforcement Learning" IEEE ISCAS, Spain, 2020.
[C74] S. Bose, V. Mohan and A. Basu, "A 75kb SRAM in 65nm CMOS for In-Memory Computing Based Neuromorphic Image Denoising" IEEE ISCAS, Spain, 2020.
[C73] N. Shah, S. Bose, C. H. Chang and A. Basu, "Reducing Temperature Induced Unreliability in Sub-Threshold Strong PUFs Through Circuit Modeling" IEEE ISCAS, Spain, 2020.
2019
2019
Journal
[J54] M. Kiani, A. Basu and S. Y. Lee "Guest Editorial: Special Issue on Selected Papers From IEEE ISICAS 2019," IEEE Trans. on Biomedical Circuits and Systems, vol. 13, no. 5, pp. 880-881, 2019.
[J53] S. Shaikh, R. So, T. Sibindi, C. Libedisnky and A. Basu, "Applying Reinforcement-based Bandit Algorithms to inch towards Autonomous intra-cortical Brain Machine Interfaces ," submitted, 2019.
[J52] R Gopalakrishnan, Yam Song Chua, Pengfei Sun, A. J. S. Kumar and A. Basu, "An efficient technique for designing and mapping convolutional neural networks onto neuromorphic hardware with crossbar array of synapses ," submitted, 2019.
[J51] G. Narasimman, J. Basu, P. Sethi, S. Krishna, Y. Chen, W. S. Lew and A. Basu, "A 72 uW Readout circuit in 65nm CMOS with Successive Approximation based Thresholding for Domain Wall Magnet based Random Number Generator," submitted, 2019.
[J50] J. Acharya and A. Basu, "Deep Neural Network for Respiratory Sound Classification in Wearable Devices Enabled by Transfer Learning," submitted, 2019.
[J49] S. Shaikh, R. So, T. Sibindi, C. Libedinsky and A. Basu, "Towards Intelligent Intra-cortical BMI (i2BMI): Low-power Neuromorphic Decoders that outperform Kalman Filters," IEEE Trans. on Biomedical Circuits and Systems, accepted, 2019.
[J48] S. K. Bose, B. Kar, M. Roy, P. K. Gopalakrishnan, Z. Lei, A. Patil and A. Basu, "ADEPOS: A Novel Approximate Computing Framework for Anomaly Detection Systems and its Implementation in 65nm CMOS," IEEE Trans. on Circuits and Systems- I, accepted 2019.
[J47] S. Shaikh, R. So, T. Sibindi, C. Libedinsky and A. Basu, "Sparse Ensemble Machine Learning to improve robustness of long-term decoding in iBMIs," IEEE Trans. on Neural Systems and Rehabilitation Engineering, accepted, 2019.
[J46] Y. Chen, Z. Wang, A. Patil and A. Basu, "A 2.86-TOPS/W Current Mirror Cross-Bar Based Machine-Learning and Physical Unclonable Function Engine for Internet-of-Things Applications," IEEE Trans. on CAS-I, vol. 66, no. 6, June 2019.
Conference
[C72] S. Bose, J. Acharya and A. Basu, "Is my Neural Network Neuromorphic? Taxonomy, Recent Trends and Future Directions in Neuromorphic Engineering" ASILOMAR Conference on Signals and Systems, Pacific Grove, USA, 2019.
[C71] A. U. Caycedo, V. Padala, G. Orchard,... A. Basu and B. Ramesh"A low-power end-to-end hybrid neuromorphic framework for surveillance applications" BMVC 2019 WORKSHOP ON OBJECT DETECTION AND RECOGNITION FOR SECURITY SCREENING, Cardiff, 2019.
[C70] J. Acharya, A. U. Caycedo, V. Padala, R. Sidhu, G. Orchard, B. Ramesh and A. Basu "EBBIOT: A Low-complexity Tracking Algorithm for Surveillance in IoVT Using Stationary Neuromorphic Vision Sensors" IEEE System on Chip Conference (SOCC), Singapore, 2019.
[C69] R. A. John, N. Tiwari, Nguyen A. Chien, A. Basu and N. Mathews, ": Ultralow Power Dual Gated Sub-Threshold Oxide Neuristors: An Enabler for Higher Order Neuronal Temporal Correlations," ICMAT, Singapore, 2019.
[C68] R. A. John, N. Yantara, F. De Angelis, S. Mhaisalkar, A. Basu and N. Mathews, "Ionotronic Halide Perovskite Drift-Diffusive Synapses for Low-Power Neuromorphic Computation, ICMAT, Singapore, 2019.
[C67] Yi Chen, Zheng Wang, Aakash Patil and Arindam Basu, "A Current Mirror Cross Bar Based 2.86-Tops/W Machine Learner and PUF with <2.5% BER in 65nm CMOS for IoT Application," IEEE ISCAS, Japan, May, 2019.
[C66] Jyotibdha Acharya, Vandana Padala and Arindam Basu, "Spiking Neural Network Based Region Proposal Networks for Neuromorphic Vision Sensors," IEEE ISCAS, Japan, May, 2019.
[C65] Pradeep Kumar Gopalakrishnan, Bapi Kar, Sumon Kumar Bose, Mohendra Roy and Arindam Basu, "Live Demonstration: Autoencoder-Based Predictive Maintenance for IoT," IEEE ISCAS, Japan, May, 2019.
[C64] S Shaikh, R So, T Sibindi, C Libedinsky and A Basu, "Real-time Closed Loop Neural Decoding on a Neuromorphic Chip," IEEE Neural Engineering Research (NER), USA, March, 2019.
[C63] S Shaikh, R So, C Libedinsky and A Basu, "Experimental Comparison of Hardware-Amenable Spike Detection Algorithms for iBMIs," IEEE Neural Engineering Research (NER), USA, March, 2019.
2018
2018
Journal
[J45] Rohit Abraham John, N. Tiwari, Y. Chen, Ankit, N. Tiwari, E. Mosconi, D.Meggiolaro, Mohit R. Kulkarni, N. Amulya, Nguyen A. Chien, A. Basu* and N. Mathews*, "Ultra-low Power Dual Gated sub-Threshold Oxide Neuristors: An Enabler for Higher Order Neuronal Temporal Correlations," ACS Nano, accepted (IF:13.7) (* denotes co-corresponding authors).
[J44] Rohit Abraham John, N. Yantara, Yan F. Ng, G. Narasimman, E. Mosconi, D.Meggiolaro, Mohit R. Kulkarni, Pradeep K. Gopalakrishnan, Nguyen A. Chien, F. De Angelis, Subodh G. Mhaisalkar, A. Basu and N. Mathews, "Ionotronic Halide Perovskite Drift-Diffusive Synapses for Low-Power Neuromorphic Computation ," Advanced Materials, accepted (IF:21.95).
[J43] H Tang, T Huang, JL Krichmar, G Orchard and A Basu, "Guest Editorial Special Issue on Neuromorphic Computing and Cognitive Systems," IEEE Transactions on Cognitive and Developmental Systems, vol. 10, no. 2, 2018.
[J42] S. Deb, A. Chattopadhyay, A. Basu and X. Fong, "Domain Wall Motion-based Dual-Threshold Activation Unit for Low-Power Classification of Non-Linearly Separable Functions ," IEEE Trans. on Biomedical Circuits and Systems, accepted.
[J41] Rohit Abraham John, F. Liu, A. Nguyen, M. Kulkarni, C. Zhu, Q. Fu, A. Basu, Z. Liu and N. Mathews, "Synergistic Gating of Electro-Iono-Photoactive 2D Chalcogenide Neuristors: co-existence of Hebbian and Homeostatic Synaptic Metaplasticity ," Advanced Materials, accepted (IF:19.8).
[J40] A. Basu, J. Acharya, T. Karnik et al " Low-Power, Adaptive Neuromorphic Systems: Recent Progress and Future Directions ," IEEE Journal on Emerging Topics in Circuits and Systems , vol. 8, no. 1, pp. 6-27, 2018.
[J39] A. Basu, M. F. Chang, E. Chicca, T. Karnik, H. Li and J. S. Seo, " Low-Power, Adaptive Neuromorphic Systems: Devices, Circuit, Architectures and Algorithms ," IEEE Journal on Emerging Topics in Circuits and Systems , vol. 8, no. 1, pp. 1-5, 2018.
Conference
[C62] V. M. Suresh, R. Sidhu, P. Karkare, A. Patil, Z. Lei and Arindam Basu, "Powering the IoT through embedded machine learning and LoRa," IEEE World Forum on Internet of Things (WF-IOT), Singapore, January, 2018.
[C61] Nimesh Kirit Shah, Manaar Alam, Durga Prasad Sahoo, Debdeep Mukhopadhyay and Arindam Basu, "A 0.16pJ/bit Recurrent Neural Network Based PUF for Enhanced Machine Learning Attack Resistance," IEEE Asia-South Pacific Design Automation Conference (ASP-DAC), Japan, January, 2019.
[C60] Sumon Kumar Bose, Bapi Kar, Mohendra Roy, Pradeep Kumar Gopalakrishnan and Arindam Basu, "ADEPOS: Anomaly Detection based Power Saving for Predictive Maintenance using Edge Computing," IEEE Asia-South Pacific Design Automation Conference (ASP-DAC), Japan, January, 2019.
[C59] Mohendra Roy, Sumon Kumar Bose, Bapi Kar, Pradeep Kumar Gopalakrishnan and Arindam Basu , "A Stacked Autoencoder Neural Network based Automated Feature Extraction Method for Anomaly detection in On-line Condition Monitoring," IEEE Symposium Series on Computational Intelligence 2018 (SSCI), India, November, 2018.
[C58] Suman Deb, Anupam Chattopadhyay, Arindam Basu and Xuanyao Fong , "Domain Wall Motion-based XOR-like Neural Activation Unit with A Programmable Threshold," 2017 IEEE Intl. Joint Conference on Neural Networks (IJCNN), Brazil, January, 2018.
2017
2017
Book Chapter
[BC1] A. Basu, Chen Yi and Yao Enyi, "Big data management in neural implants: The neuromorphic approach," Chapter in Emerging Technology and Architecture for Big-data Analytics,, pp. 293-311, 2017.
Journal
[J38] J. Acharya, A. Patil, X. Li, Y. Chen, S. C. Liu and A. Basu , "A Comparison of Low-complexity Real-Time Feature Extraction for Neuromorphic Speech Recognition ," Frontiers in Neuroscience , vol. 12, pp. 160, 2018. (IF: 3.566) .
[J37] V. R. Padala, A. Basu and G. Orchard, " A Noise Filtering Algorithm for Event-Based Asynchronous Change detection Image Sensors and its Implementation on TrueNorth," Frontiers in Neuroscience , vol.12, pp.118, 2018. (IF: 3.566) .
[J36] M. Rasouli, Y. Chen, A. Basu, S. L. Kukreja and N. V. Thakor "An Extreme Learning Machine-Based Neuromorphic Tactile Sensing System for Texture Recognition," IEEE Transactions on Biomedical Circuits and Systems, vol. 12, no. 2, 2018.
[J35] L. Iyer and A. Basu "A Spiking Neural Network Model for Category Learning," , submitted.
[J34] Z. Wang, Chen Yi, A. Patil, J. Jayabalan, X. Zhang, C.H. Chang and A. Basu "Current Mirror Array: A novel circuit topology for combining Physical Unclonable Function and Machine Learning," IEEE Transactions on Circuits and Systems-I , vol. 65, no. 4, 2018.
Conference
[C57] R Pathak, S Dash, AK Mukhopadhyay, A Basu and M Sharad, "Low Power Implantable Spike Sorting Scheme Based on Neuromorphic Classifier with Supervised Training Engine," 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), , Germany, July 2017, accepted.
[C56] S. D. Shaikh, R. So and A. Basu, "Cortical Motor Intention Decoding on an Analog Co-Processor with Fast Training for Non-Stationary Data," IEEE Biomedical Circuits and Systems conference (BioCAS) , accepted, 2017.
[C55] J. Acharya, Ser Wee and A. Basu "Feature Extraction Techniques for Low-Power Ambulatory Wheeze Detection Wearables," IEEE EMBC , Korea, Aug 2017.
[C54] Z. Wang, A. Patil, Chen Yi, C.H. Chang and A. Basu "Current Mirror Array: a Novel Lightweight Strong PUF Topology with Enhanced Reliability ," IEEE ISCAS , Baltimore, May 2017.
[C53] L. Iyer and A. Basu "Unsupervised Learning of Event-Based Image Recordings using Spike-Timing-Dependent Plasticity ," IEEE IJCNN , Alaska, May 2017.
[C52] Chen Yi, A. Basu, X. Liu, L. Yao, S. Nag, M. Je and N. V. Thakor, "A Simultaneous Neural Recording and Stimulation System Using Signal Folding in Recording Circuits," IEEE Biomedical Circuits and Systems conference (BioCAS) , accepted, 2017.
2016
2016
Journal
[J33] S. Ostadabbas, D. Demarchi and A. Basu "Guest Editorial--Special Issue on Selected Papers From IEEE BioCAS 2015," IEEE Transactions on Biomedical Circuits and Systems , vol. 10, no. 5, pp. 933-934, 2016.
[J32] S. Kadiyala, A. Sen, S. Mahajan, Q. Wang, A. Lingamneni, J. German, H. Xu, K. V. Palem and A. Basu, "An Optimum Inexact Design for an Energy Efficient Hearing Aid," Journal of Low Power Electronics , accepted, 2019.
[J31] A. Patil, S. Shen, E. Yao and A. Basu, "Hardware Architecture for Large Parallel Array of Random Feature Extractors applied to Image Recognition," Neurocomputing , accepted, 2016.
[J30] J. B. Christen and A. Basu, "Guest Editorial--ISCAS 2015 Special Issue," IEEE Transactions on Biomedical Circuits and Systems , vol. 10, no. 4, pp. 797-798, 2016.
[J29] A. Banerjee, A. Bhaduri, S. Roy, S. Kar and A. Basu, "Spiking Neural Classifier with Lumped Dendritic Nonlinearity and Binary Synapses: A Current mode VLSI Implementation and Analysis," Neural Computation , vol. 30, no. 3, Mar 2018.
Conference
[C51] S. Roy, H. Tong and A. Basu, "Online unsupervised structural plasticity algorithm for multi-layer Winner-Take-All with binary synapses," IEEE ISIC , Singapore, Dec 2016.
[C50] G. Narasimman, S. Roy, X. Fong, C. H. Chang, K. Roy and Arindam Basu, "A Low-Voltage, Low Power STDP Synapse Implementation Using Domain-Wall Magnets for Spiking Neural Networks," IEEE ISCAS, Montreal, May, 2016.
[C49] A. Bhaduri, E. Yao and Arindam Basu, "Pulse-Based Feature Extraction for Hardware-Efficient Neural Recording Systems," IEEE ISCAS, Montreal, May, 2016.
[C48] S. Hussain and Arindam Basu, "Morphological Learning in Multicompartment Neuron Model with Binary Synapses," IEEE ISCAS, Montreal, May, 2016.
2015
2015
Journal
[J28] S. Roy and A. Basu, "An online structural plasticity rule for generating better reservoirs," Neural Computation , vol.28, no. 11, pp. 2557-2584, Nov. 2016.
[J27] E. Yao and A. Basu, "VLSI Extreme Learning Machine: A Design Space Exploration," IEEE Trans. on VLSI , vol. 25, no. 1, pp. 60-74, 2017. (Among top 50 downloaded articles -- #3 in Dec 2016, #1 in Jan,#5 in Feb, #10 in Mar, #11 in April, #10 in May 2017)
[J26] S. Hussain and A. Basu, "Multi-class Classification by Adaptive Network of Dendritic Neurons with Binary Synapses using Structural Plasticity," Frontiers in Neuroscience , Mar, 2016. doi: 10.3389/fnins.2016.00113
[J25] R. Gopalakrishnan and A. Basu, "Triplet Spike Time Dependent Plasticity in a Floating-Gate Synapse," IEEE Trans. on Neural Networks and Learning Systems , accepted, 2016. DOI: 10.1109/TNNLS.2015.2506740
[J24] S. Roy and A. Basu, "An Online Unsupervised Structural Plasticity Algorithm for Spiking Neural Networks," IEEE Trans. on Neural Networks and Learning Systems , accepted, 2016. DOI: 10.1109/TNNLS.2016.2582517
Conference
[C47] A. Patil, S. Shen, E. Yao and Arindam Basu, " Hardware Architecture for Large Parallel Array of Random Feature Extractors for Image Recognition ," ELM conference, China, Dec 2015.
[C46] Sai Praveen Kadiyala, Aritra Sen, Shubham Mahajan, Qingyun Wang, Avinash Lingamneni, James Sneed German, Xu Hong, Ansuman Banerjee, Krishna V. Palem, and Arindam Basu, "Perceptually Guided Inexact DSP Design for Power, Area Efficient Hearing Aid ," IEEE BioCAS, Atlanta, USA, Oct 2015. (Invited to Special Issue in Trans. on Biomedical Circuits and Systems)
[C45] A. Patil, S. Shen, E. Yao and Arindam Basu, "Random Projection for Spike Sorting: Decoding neural signals the neural network way," IEEE BioCAS, Atlanta, USA, Oct 2015.
[C44] M. Rassouli, Chen Yi, Arindam Basu, Sunil Kukreja and Nitish V. Thakor "Spike-Based Tactile Pattern Recognition Using an Extreme Learning Machine," IEEE BioCAS, Atlanta, USA, Oct 2015. (Recipient of Industry Choice Award, Invited to Special Issue in Trans. on Biomedical Circuits and Systems)
[C43] Yao Enyi and A. Basu, "A 1 V, Compact, Current-Mode Neural Spike Detector with Detection Probability Estimator in 65 nm CMOS ," IEEE ISCAS, Portugal, May, 2015.
[C42] Chen Yi, Yao Enyi and Arindam Basu, "A 128 Channel 290 GMACs/W Machine Learning Based Co-Processor for Intention Decoding in Brain Machine Interfaces ," IEEE ISCAS, Portugal, May, 2015.
[C41] Roshan Gopalakrishnan and A. Basu, "Triplet Spike Time Dependent Plasticity in a Floating-Gate Synapse ," IEEE ISCAS, Portugal, May, 2015. (Invited to Special Issue in Trans. on Biomedical Circuits and Systems)
[C40] A. Banerjee, S. Roy, S. Kar, A. Bhaduri and A. Basu, "A Current-Mode Spiking Neural Classifier with Lumped Dendritic Nonlinearity ," IEEE ISCAS, Portugal, May, 2015.
2014
2014
Journal
[J23] S. Roy, P. P. San, S. Hussain, Lee Wang Wei and A. Basu, "Learning Spike Time Codes through Morphological Learning with Binary Synapses," IEEE Trans. on Neural Networks & Learning Systems , vol. 27, no. 7, pp. 1572-77, July 2016. (Among top 50 downloaded articles -- #41 in June, #28 in July 2016)
[J22] Chen Yi, Y. Enyi and A. Basu, "A 128 channel Extreme Learning Machine based Neural Decoder for Brain Machine Interfaces," IEEE Trans. on Biomedical Circuits & Systems , vol. 10, no. 3, pp. 679-692, June 2016. (Among top downloaded articles--#6 in Feb, #19 in Mar, #16 in Apr, #8 in May, #1 in June, #7 in July, #7 in Aug 2016)
[J21] Y. Enyi, Chen Yi and A. Basu, "A 0.7 V, 40 nW Compact, Current-Mode Neural Spike Detector in 65 nm CMOS," IEEE Trans. on Biomedical Circuits & Systems , vol. 10, no. 2, pp. 309-318, April 2016.
[J20] S. Roy, A. Banerjee and A. Basu, "Liquid State Machine with Dendritically Enhanced Readout for Low-power, Neuromorphic VLSI Implementations," IEEE Trans. on Biomedical Circuits & Systems , vol. 8, no. 5, pp. 681-695, 2014. (Among top 50 downloaded articles in Nov-Dec 2014, Jan-Feb 2015)
[J19] R. Gopalakrishnan and A. Basu, "On the non-STDP behavior and its remedy in a Floating-gate Synapse," IEEE Trans. on Neural Networks & Learning Systems, vol. 26, no. 10, Oct 2015. (Among top 50 downloaded article in Oct 2015)
[J18] S. Hussain, S. C. Liu and A. Basu, "Biologically plausible, Hardware-friendly Structural Learning for Spike-based pattern classification using a simple model of Active Dendrites," Neural Computation , vol. 27, no. 4, pp. 845-897, April 2015.
Conference
[C39] S. Roy, S. Kar and A. Basu, "Architectural Exploration for On-chip, OnlineLearning in Spiking Neural Networks," IEEE ISIC, Singapore, Dec, 2014.
[C38] R. Gopalakrishnan and A. Basu, "Robust Doublet STDP in a Floating-gate Synapse," IEEE IJCNN, Beijing, July, 2014.
[C37] P. P. San, A. Basu and S. Hussain, "Hardware-Friendly Morphological Learning for Spiking-Neuron with Dendritic Nonlinearity ," IEEE IJCNN, Beijing, July, 2014.
[C36] S. Hussain, S. C. Liu and A. Basu , "Improved Margin Multi-Class Classification Using Dendritic Neurons with Morphological Learning ," IEEE ISCAS, Melbourne, June, 2014.
2013
2013
Journal
[J17] A. Basu, S. Shuo, H. Zhou, G. Huang and M. Lim, "Silicon Spiking Neurons for Hardware Implementation of Extreme Learning Machines," Neurocomputing. , vol. 102, pp. 125-134, Feb. 2013.
[J16] A. Singh, A. Basu, K. V. Ling and V. J. Mooney, "Models for Characterizing noise based PCMOS circuits," IEEE/ACM Transactions on Embedded Computing. , vol. 13, no. 1s, Nov. 2013 .
[J15] S. Ramakrishnan, A. Basu, L. K. Chiu, J. Hasler, D. Anderson and S. Brink, "Speech Processing on a Reconfigurable Analog Platform," IEEE Trans. on VLSI. , accepted, 2013.
[J14] Chen Yi, A. Basu, M. Je, L. Liu, X. Zou, R. Ramamurthy and G. Dawe, "A Digitally Assisted, Signal Folding Neural Recording Amplifier," IEEE Trans. on Biomedical Circuits & Systems, vol. 8, no. 4, Aug 2014. (Among top 50 downloaded articles in July-Nov 2014)
Conference
[C35] A. Lingameni, A. Basu, C. Enz, C. Piguet and K. Palem, "Pushing the Energy-Efficiency Limits of Inexact DSP Circuits through Reciprocative Error Compensation ," ACM/IEEE Design Automation Conference (DAC), Austin, USA, June 2013.
[C34] S. Hussain, R. Gopalakrishnan, A. Basu and S. C. Liu, "Morphological Learning: Increased Memory Capacity of Neuromorphic Systems with Binary Synapses Exploiting AER Based Reconfiguration ," IEEE IJCNN, Dallas, USA, Aug 2013.
[C33] S. Roy, A. Basu and S. Hussain, "Hardware efficient, Neuromorphic Dendritically Enhanced Readout for Liquid State Machines ," IEEE BioCAS, Rotterdam, Oct. 2013. (Invited to Special Issue in Trans. on Biomedical Circuits and Systems)
[C32] Y. Enyi, S. Hussain, , A. Basu and G. B. Huang "Computation using Mismatch: Neuromorphic Extreme Learning Machines ," IEEE BioCAS, Rotterdam, Oct. 2013.
2012
2012
Journal
[J13] F.Li, A. Basu, C. Chang and A. Cohen, "Dynamical Systems guided Design and Analysis of Central Pattern Generators," IEEE Trans. on Circuits and Systems I, vol. 59, no. 12, pp. 3046-59, 2012.
[J12] S. Brink, S. Nease, P. Hasler, S. Ramakrishnan, R. Wunderlich, A. Basu and B. Degnan, "A Learning-Enabled Neuron Array IC Based upon Transistor Channel Models of Biological Phenomenon," IEEE Trans. on Biomedical Circuits and Systems, vol. 7, no. 1, pp. 71-81, Feb 2013.
[J11] S. Hussain, A. Basu, M. Wang and T. Hamilton, "Delay Learning Architectures for Memory and Classification," Neurocomputing. , vol. 138, pp. 14-26, 2014.
[J10] F. Li, C. H. Chang, A. Basu and L. Siek, "A 0.7 V Low-power Fully Programmable Gaussian Function Generator for Gaussian Correlation Associative Memory," Neurocomputing, accepted, 2013.
Conference
[C31] Y. Chen, A. Basu and Je Minkyu, "A Digital Assisted, Pseudoresistor-less Neural Amplifier," IEEE MWSCAS, USA, Aug 2012.
[C30] Y. Chen, A. Basu and Je Minkyu, "A Signal Folding Neural Amplifier Exploiting Neural Signal Statistics," IEEE BioCAS, Taiwan, Nov 2012.
[C29] S. Hussain, A. Basu, M. Wang and T. Hamilton, "DELTRON: Neuromorphic Architectures for Delay based Learning," IEEE APCCAS, Taiwan, Dec 2012.
[C28] D. Sukumaran, Y. Enyi, Sun Shuo, A. Basu, D. Zhao and J. Dauwels, "A Low-power, Reconfigurable Smart Sensor System for EEG Acquisition and Classification," IEEE APCCAS, Taiwan, Dec 2012.
2011
2011
Journal
[J9] A. Basu, "Small-signal Neural Models and their Applications," IEEE Trans. on Biomedical Circuits and Systems. , vol. 6, no. 1, pp. 64-75, Feb. 2012. [PDF]
[J8] A. Basu and P. Hasler, "A Fully Integrated Architecture for Fast and Accurate Programming of Floating-gates," IEEE Trans. on VLSI. vol. 19, no. 6, pp. 953-62, Jun. 2011. [PDF]
Conference
[C27] D. Zhao, M. Tan, H. Cha, J. Qu, Y. Mei, H. Yu, A. Basu and Minkyu Je,"High Voltage Pulser for Ultrasound Medical Imaging Applications," IEEE ISIC 2011, Singapore. [PDF]
[C26] A. Singh, A. Basu , K.V. Ling and V.J. Mooney,"Modeling multi-output Filtering Effects in PCMOS," IEEE VLSI-DAT 2011, Hsinchu, Taiwan. [PDF]
[C25] A. Gupta, V.J. Mooney, S. Mandavalli, K.V. Ling, A. Basu , H. Johan and B. Tandianus,"Low Power Probabilistic Floating point Multiplier Design," IEEE ISVLSI 2011, Chennai, India. [PDF]
[C24] Sun Shuo and A. Basu ,"Analysis and Reduction of Mismatch in Silicon Neurons," IEEE Biomedical Circuits and Systems, San Diego, Nov. 2011. [PDF]
[C23] Fei Li, A. Basu , Chang Chip Hong and Avis Cohen, "Dynamical Systems: a Tool for Analysis and Design of Silicon Half Center Oscillators," IEEE Biomedical Circuits and Systems, San Diego, Nov. 2011. [PDF]
2010
2010
Tutorial
[T1] P. Hasler and A. Basu, "FPAA devices for Biological Modeling, Computing, and Interfacing Applications," IEEE Biomedical Circuits and Systems, Paphos, Cyprus, Nov. 2010.
Journal
[J7] A. Basu and P. Hasler, "Nullcline based design of Silicon Neurons," IEEE Trans. on CAS I, vol. 57, no. 11, Nov. 2010, pp. 2938-47.. [PDF]
[J6] A. Basu, C. Petre and P. Hasler, "Dynamics and Bifurcations in a Silicon Neuron," IEEE Trans. on Biomedical Circuits and Systems. vol. 4, no. 5, pp. 320-28, Oct. 2010. [PDF]
[J5] A. Basu, S. Ramakrishnan, C. Petre, S. Koziol S. Brink and P. Hasler,"Neural Dynamics in Reconfigurable Silicon," IEEE Trans. on Biomedical Circuits and Systems. vol. 4, no. 5, pp. 311-19, Oct. 2010.[PDF]
[J4] A. Basu, S. Brink, C. Schlottmann, S. Ramakrishnan, et.al, "A Floating-gate based Field Programmable Analog Array," IEEE Journal of Solid State Circuits. vol. 45, no. 9, pp. 1781-94, Sept. 2010.[PDF]
[J3] S. Suh, A. Basu, C. Schlottmann, P. Hasler and J. Barry, "Low-Power Discrete Fourier Transform for OFDM: A Programmable Analog Approach," IEEE Trans. on CAS I, vol. 58, no. 2, Feb. 2011, pp. 290-98. [PDF]
Conference
[C22] A. Basu and P. Hasler,"Small-signal Neural Models and its Application to determining Model Parameters," IEEE BioCAS 2010, Paphos, Cyprus. [PDF]
[C21] A. Basu, Shubha Ramakrishnan and P. Hasler,"Neural Dynamics in Reconfigurable Silicon," ISCAS 2010, Paris. [PDF]
[C20] S. Qureshi, A. Basu, B. Bicen, F. Degertekin and P. Hasler, "Integrated Low Voltage and Low Power CMOS circuits for Optical Sensing of Diffraction based Micromachined Microphone," ISCAS 2010, Paris.. [PDF]
[C19] S. Koziol, C. Schlottmann, A. Basu et.al., "Hardware and Software Infrastructure for a family of Floating-gate based FPAAs," ISCAS 2010, paris. (Best Live Demonstration Award). [PDF]
2009
2009
Conference
[C18] S. Peng, G. Gurun, C. Twigg, M. Qureshi, A. Basu et.al, "A Large Scale Reconfigurable Smart Sensory Chip," in Proc. of IEEE ISCAS, pp. 2145-48, May 2009. [PDF]
[C17] B. Marr, A. Basu, S. Brink and P. Hasler, "A Learning Digital Computer," in Proc. of the Design Automation Conference (DAC), pp. 617-618, July 2009. [PDF]
2008
2008
Journal
[J2] S. Peng, M. Qureshi, P. Hasler, A. Basu and F. L. Degertekin, "A Charge-Based Low-Power High-SNR Capacitive Sensing Interface Circuit," IEEE Trans. on Circuits and Systems-I, vol. 55, no. 7, pp. 1863-72, Aug 2008. [PDF]
Conference
[C16] A. Basu, C. Twigg, S. Brink, P. Hasler et.al, "RASP 2.8: A New Generation of Floating-gate based Field Programmable Analog Array," in Proc. of IEEE Custom Integrated Circuits Conference, pp. 213-216, Sept. 2008, San Jose, USA. [PDF]
[C15] A. Basu, C. Petre and P. Hasler, "Bifurcations in a Silicon Neuron," in Proc. of IEEE Intl. Symposium on Circuits and Systems, pp.428-431, May 2008, Seattle, USA. (Finalist, Best Student Paper) [PDF]
[C14] G. Gurun, M. Qureshi, M. Balantekin, R. Guldiken, J. Zahorian, S. Peng, A. Basu, M. Karaman, P. Hasler and L. Degertekin, "Front-end CMOS electronics for monolithic integration with CMUT arrays: Circuit design and initial experimental results," in Proc. of IEEE Ultrasonics Symposium, pp. 390-393, Nov 2008. [PDF]
2007
2007
Journal
[J1] A. Basu, R. Robucci, and P. Hasler, "A Low-power, Compact, Adaptive Log-TIA operating over Seven decades of current," IEEE Trans. on Circuits and Systems-I, vol. 54, no. 10, pp. 2167-2177, Oct 2007. [PDF]
Conference
[C13] A. Basu, K. Odame and P. Hasler, "Dynamics of a Logarithmic Transimpedance Amplifier," in Proc. of IEEE Intl. Symposium on Circuits and Systems, pp. 1673-1676, May 2007, New Orleans, USA. [PDF]
[C12] A. Basu, R. Robucci, and P. Hasler, "A Low-power, Compact, Adaptive Log-TIA operating over Seven decades of current" in Proc. of IEEE Intl. Symposium on Circuits and Systems, pp. 3055-3058, May 2007, New Orleans, USA. [PDF]
[C11] A. Basu and P. Hasler, "A fully integrated architecture for fast programming of Floating-gates," in Proc. of IEEE Intl. Symposium on Circuits and Systems, pp. 957-960, May 2007, New Orleans, USA. [PDF]
[C10] K. Odame, C. Twigg, A. Basu and P. Hasler, "Studying Nonlinear Dynamical Systems on a Reconfigurable Analog Platform," in Proc. of IEEE Intl. Symposium on Circuits and Systems, pp. 445-448, May 2007, New Orleans, USA. [PDF]
[C9] P.Hasler, A. Basu et. al., "Above Threshold pFET Injection Modeling intended for Programming Floating-Gate Systems," in Proc. of IEEE Intl. Symposium on Circuits and Systems, pp. 1557-1560, May 2007, New Orleans, USA. [PDF]
[C8] P. Hasler, S. Koziol, E. Farquhar and A. Basu, "Transistor Channel Dendrites implementing HMM Classifiers," in Proc. of IEEE Intl. Symposium on Circuits and Systems, pp. 27-30, May 2007, New Orleans, USA. [PDF]
2006
2006
Conference
[C7] S. Peng, M. Qureshi, A. Basu et al., "A Floating-gate Based Low-Power Capacitive Sensing Interface Circuit," in Proc. of IEEE Custom Integrated Circuits Conference, pp. 257-260, Sept. 2006, San Jose, USA. [PDF]
[C6] S. Peng, M Qureshi, A. Basu et al., "Floating-Gate Based CMUT Sensing Circuit Using Capacitive Feedback Charge Amplifier," in Proc. of IEEE Ultrasonics Symposium, Oct. 2006, Vancouver, Canada. (Best Student Paper) [PDF]
2005
2005
Conference
[C5] P. Saha, A. Basu et al., "Design and Implementation of RF front-end for UWB systems," in Proc. of the 28th General Assembly of International Union of Radio Science (URSI), Oct 2005. [PDF]
2004
2004
Conference
[C4] A. Basu, A. Mal and A.S. Dhar, "Digital controlled analog architecture for DCT and DST using capacitor switching," in Proc. of IEEE Intl. Symposium on Circuits and Systems, Vol. 2, pp. 309-312, May 2004, Vancouver, Canada. [PDF]
[C3] A.Basu and A.S. Dhar, "Design Issues in Switched Capacitor Ladder Filters," in Proc. of IEEE International Conference on VLSI Design, pp. 862-865, Jan 2005, Kolkata, India. [PDF]
[C2] A. Mal, A. Basu and A.S. Dhar, "Sampled analog architecture for DCT and DST," in Proc. of IEEE Intl. Symposium on Circuits and Systems, Vol. 2, pp. 825-828, May 2004, Vancouver, Canada. [PDF]
[C1] R. Chawla, H. Lo, A. Basu, P. Hasler and B. Minch, "A fully programmable log-domain bandpass filter using multiple-input translinear elements," in Proc. of IEEE Intl. Symposium on Circuits and Systems, pp. 33-36, Vol. 1, May 2004, Vancouver, Canada. [PDF]
2007-2008
2007-2008
Chaos - book
This is work I had done with Dr. Predrag Cvitanovic, Domenico Lippolis and Jonathan Halcrow. It concerns the design of a low-dimensional Poincare section for highly contracting flows based on mappings of the unstable manifold. The curvature of the unstable manifold allows us to track the stretch and fold dynamics of chaos in Rossler flow as an example. Symbolic dynamics is used to predict cycles and the markov partitioning. The effect of noise in limiting the accuracy in resolvng state space is also considered.
This work is available online here The MATLAB code used and the generated figures are also available in the archives linked to this page: http://www.cns.gatech.edu/ChaosBook/projects/index.shtml.
This stuff is used in Predrag's book about chaos: "Chaos: Classical and Quantum" available at http://chaosbook.org/
2005
2005
M. Tech Thesis
My M.Tech thesis submitted to IIT Kharagpur and completed under the supervision of Dr. A.S. Dhar and Dr. N.B. Chakrabarti concerned the development of analog vlsi techniques for video processing and transmission. Also I had worked on pulse generators for UWB applications. The thesis is available here
2004
2004
B. Tech Thesis
My B. Tech thesis also under the supervision of Dr. A. S. Dhar was concerned with optimising power dissipation in the OTA used for switched capacitor filter design. I also worked on developing switched capacitor techniques to implement DCT and DST efficiently. A copy of the thesis is here
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