Visit Google scholar for latest publications.
JOURNALS
G Chittattukara Girijan, AS Chakraborty, RS Chakraborty, BA Jose, Challenges in Modelling Analog PUFs: A Study of Hybrid and Diode Triode Current Mirror Inverter PUF Under Machine Learning Attacks, IET Circuits, Devices & Systems 2025 (1).
AJ Chemmanam, B Jose, A Moopan, Improved multi object tracking with locality sensitive hashing, Springer Pattern Analysis and Applications 27 (4), 136, 2024.
Gisha CG, AS Chakraborty, RS Chakraborty, B Antony Jose, J Mathew, “A Novel Physical Unclonable Function Based on Hybrid Current Mirror” Springer Journal of Hardware and Systems Security, 1-13, Oct 2023.
Ajai John Chemmanam, Shahanaz N, Bijoy A Jose, “Fused features for no reference image quality assessment”, Imaging Science journal, Taylor and Francis, Vol. 70, No. 5, pp 287-299, Jan 2023 (impact factor 2.0)
Ajai John Chemmanam, Bijoy A Jose, Asif Moopan, “A Multi-Tasking Model for Object Detection, Instance Segmentation and Keypoint Estimation Tasks”. Journal of Information Science and Engineering, Vol. 39 No. 3, May, 2023 (impact factor 0.77)
Deepa Mathew and Bijoy A Jose, “Real-Time Performance Analysis and Tuning of Embedded System Virtualization Architecture Based on KVM”, International Journal of Embedded and Real-Time Communication Systems (IJERTCS), 2021 (impact factor 0.17)
Nithin P.B, Albert Francis, Ajai John Chemmanam, Bijoy A Jose and Jimson Mathew, ”Interactive Robotic Testbed for Performance Assessment of Machine Learning based Computer Vision Techniques,” Journal of Information Science and Engineering, Vol. 36 No. 5, pp. 1055-1067, September, 2020 (impact factor 0.77, WoS listed)
D. Mathew, B. A. Jose, J. Mathew and P. Patra, "Enabling Hardware Performance Counters for Microkernel-Based Virtualization on Embedded Systems," in IEEE Access, vol. 8, pp. 110550-110564, 2020, doi: 10.1109/ACCESS.2020.3002106. (impact factor 3.96, WoS 4.0)
R. K. Sanodiya, Jimson Mathew, Biju Paul, and Bijoy A. Jose, “A Kernelized Unified Framework for Domain Adaptation,” IEEE Access, vol. 7, pp. 181381-181395, 2019. (impact factor 3.96, WoS 4.0)
Deepa Mathew, Bijoy A. Jose, and Priyadarsan Patra, “Performance Analysis of Microkernel Based Virtualization Techniques on Embedded Systems,” Journal of Low Power Electronics (JOLPE), 15(2), pp. 273-281, June 2019. (impact factor 0.35, WoS listed)
Jos Prakash, Babita Jose, Jimson Mathew, and Bijoy A. Jose, “A differential quantizer based error feedback modulator for analog to digital converters,” IEEE Transactions on Circuits & Systems II, 99, pp. 1-5, Feb. 2017. (impact factor 3.52, WoS 3.25)
Jos Prakash, Babita Jose, Jimson Mathew, and Bijoy A. Jose, “A triple-mode hexa-standard reconfigurable TI cross-coupled modulator,” International Journal of Electronics, 104(7), pp. 1142-1160, Taylor & Francis, Mar. 2017. (impact factor 1.12, WoS 1.07)
Bijoy Jose and Abhishek Agrawal, “Improving Energy efficiency of virtual machines with timer tick variations,” Journal of Low Power Electronics (JOLPE), 11(3), 401-405, 2015. (impact factor 0.35, WoS listed)
Bijoy Jose and Damu Radhakrishnan, “Redundant binary partial product generators for compact accumulation in Booth multipliers,” Elsevier Microelectronics Journal, 40(11), pp. 1606-1612, Nov. 2009. (impact factor 1.57, WoS 1.28)
Bijoy A. Jose, Hiren D. Patel, Sandeep K. Shukla, Jean-Pierre Talpin, “Generating Multi-Threaded code from Polychronous Specifications,” Electronic Notes on Theoretical Computer Science, 238:57-69, Jan. 2009. (impact factor 0.79, WoS listed)
Bijoy A. Jose, Bin Xue and Sandeep K. Shukla, An Analysis of the Composition of Synchronous Systems, Electronic Notes in Theoretical Computer Science, 245: 69-84, Aug., 2009. (impact factor 0.79, WoS listed)
BOOK CHAPTERS
Bijoy A. Jose, Bin Xue, Sandeep K. Shukla and Jean-Pierre Talpin, “Programming models for Multi-Core Embedded Software,” Book Chapter in: Multi-Core Embedded Systems, CRC Press, Taylor & Francis, April 2010. ISBN: 978-1-4398-1161-0.
Bijoy A. Jose and Sandeep K. Shukla, “MRICDF: A polychronous model for embedded software synthesis”, Book Chapter: Synthesis of Embedded Software. Springer Circuits and Systems, 2010. ISBN: 978-1-4419-6399-4.
CONFERENCES
CG Gisha, AS Chakraborty, RS Chakraborty, BA Jose, J Mathew, “Diode-Triode Current Mirror Inverter PUF: A Novel Mixed-Signal Low Power Analog PUF” IEEE 66th International Midwest Symposium on Circuits and Systems, pp. 1132-1136, USA, 2023.
E Jose, AJ Chemmanam, BA Jose, A Mooppan, “Detecting Anomalies in Power Consumption of an Internet of Things Network Using Statistical Techniques”, Springer Proceedings of Artificial Intelligence Driven Circuits and Systems, pp 153-164, DAIICT, 2022.
CG Gisha, BA Jose, J Mathew, “A novel mixed-signal PUF based on Current Mirror Inverter “IEEE International Symposium on Smart Electronic Systems (iSES), pp. 89-94, NIT Warangal, 2022
AJ Chemmanam, BA Jose, “Joint learning for multitasking models” Responsible Data Science: Springer Proceedings of ICDSE 2021, DAIICT, pp. 155-167, 2021.
P Akhil, BA Jose , “A Profiling Based Approach To Detect ARP Poisioning Attacks“, International IEEE Conference on Green Energy, Computing and Sustainable Technology (GECOST), pp 1-5, Malaysia, 2021.
Deepa Mathew and Bijoy A. Jose, “Profiling Applications for a Virtual Machine on an Embedded System”, 3rd Intl. Conf. on Advances in Electronics, Computers and Communications (ICAECC 2020), December 2020
Ruksin Kamal, Ajai John Chemmanam, Bijoy A Jose, Sunil Mathews, Eldho Varghese, “Construction Safety Surveillance Using Machine Learning”, Intl Symposium on Networks, Computers and Communications (ISNCC), pp 1-6, Montreal, Canada, October 2020
Ajish Zacharias, Gisha C G and Bijoy A. Jose, “Chaotic Ring Oscillator based True Random Number Generator for Secure Internet of Things Product,” 24th IEEE International VLSI Design and Test Conference (VDAT) , IIT Bhuvaneswar, July 2020.
Deepa Mathew, Binish M. C., and Bijoy A. Jose, “Computationally Efficient Intra and Inter Mode Decision in H.264/AVC”, Third International Conference on Computing and Network Communications (CoCoNet), Procedia Computer Science, Volume 171, 2020, Pages 360-368, December 2019.
Nithin P.B, Albert Francis, Ajai John Chemmanam, Bijoy A Jose, “Face Tracking Robot testbed for Performance Assessment of Machine Learning Techniques”, The 7th International IEEE Conference on Smart Computing and Communication, Malaysia, June, 2019.
Grieshma Unnikrishnan, Deepa Mathew, Bijoy A. Jose and Raju Arvind, “Hybrid Route Recommender System for Smarter Logistics”, The 4th IEEE International Conference on High Performance and Smart Computing (HPSC), Washington DC, May 2019.
Deepa Mathew and Bijoy A. Jose, “Performance Analysis of Virtualized Embedded Computing Systems”, 7th IEEE Intl. Symposium on Embedded computing and system Design (ISED), NIT Durgapur, Dec. 2017.
Arya S, Deepa Mathew, Bijoy A. Jose, An Offline Online Strategy for IoT using MQTT, 4th IEEE International Conference on Cyber Security and Cloud Computing, New York, Columbia University, USA, June 2017.
Ajai J. Chemmanam, Salmanul Faris K, Sreelekshmi. S., M.Vasu Sairam, and Bijoy A. Jose, Portable E-Voting decision system, 6th IEEE Intl. Conf. on Computer Comm. and Informatics (ICCCI), Coimbatore, Jan., 2017.
Elizabeth George E., Elsa Mary Cyriac, Sreedevi K., and Bijoy A. Jose, Voice Biometric System Based Personnel Identification, Kerala Technological Congress (KETCON-2017 Embedded systems and VLSI Technologies), Kerala, Jan. 2017.
Akhil P., Abhijith C. R. and Bijoy A. Jose, Interfacing a Computer Aided Design Tool with a Multi-Function Numerical Machine, 6th IEEE Intl. Symposium on Embedded computing and system Design (ISED), IIT Patna, Dec. 2016.
Akhil P., Abhijith C. R. and Bijoy A. Jose, An indigenous Computer Aided Design tool for multifunction printers, 2nd India International Science Festival, National Physical Laboratory, CSIR, New Delhi, Dec. 2016.
Bijoy A. Jose, Abdoulaye Gamatie, Julien Ouy and Sandeep K. Shukla, SMT Based False Causal loop Detection during Code Synthesis from Polychronous Specifications, ACM/IEEE 9th Intl. Conf. on Formal Methods and Models for Codesign (MEMOCODE), Cambridge, UK, July, 2011.
Bijoy A. Jose, Manuj Sabharwal and Abhishek Agrawal (Intel Corp. internship work), “Power implications of high resolution timer tick settings,” 1st International Conference on Energy aware computing, Egypt, Dec. 2010.
Bijoy A. Jose, Jason Pribble and Sandeep K. Shukla, "Faster software synthesis using Actor Elimination Techniques for Polychronous formalism," in Proceedings of Applications of Concurrency to System Design (ACSD), Portugal, June 2010.
Bijoy A. Jose and Sandeep K. Shukla, An Alternative Polychronous Model and Synthesis Methodology for Model-Driven Embedded Software, 15th IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), Taiwan, Jan. 2010.
Mahesh Nanjundappa, Hiren D. Patel, Bijoy A. Jose and Sandeep K. Shukla, “SCGPSim: A Fast SystemC Simulator on GPUs,” 15th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 149-154, Taiwan, Jan. 2010. [Best Paper Award]
Bijoy A. Jose, Jason Pribble, Lemaire Stewart, and Sandeep K. Shukla, “EmCodeSyn: A Visual Environment for Multi-Rate Data Flow Specifications and Code Synthesis for Embedded Applications,” 12th Intl. IEEE Forum on specification and Design Languages (FDL'09), pp. 1-6, Sophia Antipolis, France, Sept. 2009.
Syed Suhaib, Bijoy A. Jose, Deepak A. Mathaikutty, and Sandeep K. Shukla, “Formal Transformation of a KPN specification into a GALS implementation,” Proc. of Forum on Specification and Design Languages (FDL'08), pp. 84-89, Germany, Sept. 2008.
Bijoy A. Jose, Sandeep K. Shukla, Hiren D. Patel, and Jean-Pierre Talpin, “On the Deterministic Multi-threaded Software Synthesis from Polychronous Specifications,” Proc. of the 6th ACM/IEEE International Conference on Formal Models and Methods in Co-Design (MEMOCODE'08), pp. 129-138, Anaheim, CA, June 2008.
Bijoy Jose and Damu Radhakrishnan, “Fast redundant binary partial product generators for Booth multiplication",” Proc. of 50th IEEE Midwest Symposium on Circuits and Systems (MWSCAS'07), pp. 297-300, Montreal, Canada, Aug. 2007. [Best Paper Award finalist]
Bijoy Jose and Damu Radhakrishnan, “Delay Optimized Redundant Binary Adders,” Proc. of 13th IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp.514 - 517, Nice, France, Dec. 2006.
POSTERS/WHITE PAPERS
Bijoy A. Jose, Sushma Thimmappa, Srinivasa Karlapalem, Johnnie Birch, and Kumar Shiv, “A playbook for Analysis, Prototyping and Estimation of optimizations targeting Android Dalvik Virtual Machine”, Intel Software Professionals Conference, Santa Clara, USA, 2013. [Best Paper Award]
Bijoy A. Jose and Abhishek Agrawal, “Energy Efficiency of Virtual Machines,” White paper at Intel Developer zone, 2011.
Bijoy A. Jose, “Formal model driven software synthesis for embedded systems,” Ph.D. Dissertation Forum poster at IEEE Design, Automation and Test in Europe (DATE), Grenoble, France, 2011.