He received his B.S. and Ph.D. degrees from the School of Electrical Engineering and Computer Science at Seoul National University, Korea, in 2011 and 2017, respectively. He held a research fellow position in the Electrical and Computer Engineering Department at the National University of Singapore (NUS) from 2017 to 2020. From 2020 to 2024, he researched high-speed path test circuits for HBM as a staff engineer in the DRAM Design team at Samsung Electronics, South Korea. His main research focuses on developing low-power and low-noise multi-channel bio-signal acquisition systems and neural prostheses with neuromorphic processing SoCs. He is also interested in high-bandwidth memory (HBM).
'25.03~present (MS)
Neuromorphic SoC for Neural Interface
'25.03~present (MS)
Neuromorphic SoC for Neural Interface & Neural Network-based Auditory Signal Processing
'24.03~present (MS)
Cell-based High Speed Data Path & Optical DFT Methodology
'25.03~present (MS)
Radiation-Hardened PMIC Design
'25.03~present (MS)
Radiation-Hardened ADC Design
TBC
TBC
'25.03~Present
DAQ Design for IC Test
'25.03~Present
DAQ Design for IC Test
'25.03~Present
DAQ Design for IC Test
TBC
TBC
TBC
'24.03~'25.02 (BS)
Cell-based High Speed Data Path
'24.06~'25.06 (BS)
MS, KAIST,Korea
Processing-In-Memory (PIM)
'24.06~'25.06 (BS)
intern, KIST, Korea
RISC & Cell-based Design
'25.03~'25.06 (BS)
Hyundai Motor Group, Korea
Standard Cell Char.
'24.03~'26.02
Neuromorphic SoC for Neural Interface
Samsung Electronics
'24.03~'25.08
Processing-In-Memory (PIM)
BOS Semiconductors
'24.06~present
Processing-In-Memory (PIM)
TBC
TBC