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Syllabus
Syllabus
Experiment No
To plot the Characteristics of a BJT and FET.
Design and implement clipper and clamper (positive and negative for both)using diodes.
Design and implement an Astable Multivibrator circuit using 555 timer for a given frequency and duty cycle.
Given a 4-variable logic expression, simplify it using Entered Variable Map and realize the simplified logic expression using 8:1 multiplexer IC.Simulate and verify its working using Verilog code.
Perform n bit addition / subtraction using 4 bit full adder IC. Simulate and verify its working using Verilog code.
Design and implement BCD to gray code. Simulate and verify given decoder using VERILOG code.
Design and implement Ring counter and Johnson counter using 4-bit shift register and demonstrate its working. Simulate and verify the working using VERILOG code.
Design and implement a mod-n (n<8) synchronous up or down counter using J-K Flip-Flop ICs and demonstrate its working. Simulate and verify mod 8 synchronous up or down counter using VERILOG code.
Design and implement an asynchronous counter using decade counter IC to count up from 0 to n (n<=9) and demonstrate its working.
Design and implement a sequence Detector (3 bits) using Moore model and D flip flop. Simulate and verify the working using VERILOG code.
DE LAB -CLASS DOCUMENT'S
DE LAB -CLASS DOCUMENT'S
CLASS 1 _Introduction to Digital IC and Gates verification
CLASS 1 _Introduction to Digital IC and Gates verification
material
Reference video
CLASS 2 _4-Variable logic expression implementation using 8:1 multiplexer
CLASS 2 _4-Variable logic expression implementation using 8:1 multiplexer
material
Reference video
CLASS 3 _1_N bit addition / subtraction using 4 bit full adder IC
CLASS 3 _1_N bit addition / subtraction using 4 bit full adder IC
material
Reference video
CLASS 3_2_Design and implement BCD to gray code
CLASS 3_2_Design and implement BCD to gray code
material
Reference video
CLASS 4 _Design and implement Ring counter and Johnson counter using 4-bit shift register
CLASS 4 _Design and implement Ring counter and Johnson counter using 4-bit shift register
material
Reference video
CLASS 5 _Asynchronous counter using decade counter IC
CLASS 5 _Asynchronous counter using decade counter IC
material
Reference video
CLASS 6 _ LAB CIE 1
CLASS 6 _ LAB CIE 1
Question Bank
CLASS 7 _Synchronous up or down counter using J-K Flip-Flop ICs
CLASS 7 _Synchronous up or down counter using J-K Flip-Flop ICs
material
Reference video
CLASS 8 _Sequence Detector (3 bits) using Moore model and D flip flop
CLASS 8 _Sequence Detector (3 bits) using Moore model and D flip flop
material
Reference video
CLASS 9 _1_ BJT and FET
CLASS 9 _1_ BJT and FET
material
Reference video
CLASS 9_2_ clipper and clamper
CLASS 9_2_ clipper and clamper
material
Reference video
CLASS 10_Astable Multivibrator circuit using 555 timer
CLASS 10_Astable Multivibrator circuit using 555 timer
material
Reference video
LAB CIE 2
LAB CIE 2
Question Bank
DE LAB -Explanation-DIGITAL CIRCUITS
DE LAB -Explanation-DIGITAL CIRCUITS
Experiment -10: SEQUENCE Detector
Experiment -10: SEQUENCE Detector
Experiment -9:DECADE COUNTER
Experiment -9:DECADE COUNTER
Material
Experiment -8:SYNCHRONOUS COUNTER
Experiment -8:SYNCHRONOUS COUNTER
Experiment -7: RING AND JOHNSON COUNTER
Experiment -7: RING AND JOHNSON COUNTER
Experiment -6: BCD TO GRAY CODE USING NAND
Experiment -6: BCD TO GRAY CODE USING NAND
Material
Experiment -5 ADDER AND SUBTRACTOR USING FULL ADDER IC
Experiment -5 ADDER AND SUBTRACTOR USING FULL ADDER IC
Material
Experiment -4: MUX IMPLIMENTAION
Experiment -4: MUX IMPLIMENTAION
Material
DE LAB -Explanation- ANALOG CIRCUITS
DE LAB -Explanation- ANALOG CIRCUITS
Experiment -3: ASTABLE MULTI VIBRATOR USING 555 TIMER
Experiment -3: ASTABLE MULTI VIBRATOR USING 555 TIMER
Material
Experiment -2:CLIPPER AND CLAMPER
Experiment -2:CLIPPER AND CLAMPER
Experiment -1:BJT AND FET CHATECTERSTICS
Experiment -1:BJT AND FET CHATECTERSTICS
Material
DE LAB -Explanation-VERILOG CODE
DE LAB -Explanation-VERILOG CODE
DE LAB -Explanation- EXTRA VERILOG CODE
DE LAB -Explanation- EXTRA VERILOG CODE
DE LAB
DE LAB
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