2026
IEEE CAL
Cross-Layer Head Prediction and KV-Cache Prefetching for High-Performance MoH LLM
Yingnan Zhao, Ke Wang, Avinash Karanth, Razvan Bunescu and Ahmed Louri
Accepted to appear in IEEE Computer Architecture Letters (CAL), 2026.
HiPC'26
Defect-Aware Reconfigurable Spin-Photon Integrated Quantum Computing Architecture
Zach Takacs, Harsha Chenji, Wojciech Jadwisienczak and Avinash Karanth
Accepted to appear 33rd IEEE International Conference on High-Performance Computing (HiPC), Bengaluru, India, December 16-19, 2026. (Acceptance Rate ~ 25%)
HiPC'26
Sparsity-Aware Variable Precision Energy-Efficient Photonic Neural Network Accelerator
Yuan Li, Peter Eldhose, Prakash Chand Kuve and Avinash Karanth
Accepted to appear 33rd IEEE International Conference on High-Performance Computing (HiPC), Bengaluru, India, December 16-19, 2026. (Acceptance Rate ~ 25%)
MWSCAS'26
Hardware Validation of CMOS Inverter PUF Using Commercial Integrated Circuits
Aakriti Barat, Savas Kaya and Avinash Karanth
IEEE 69th International Midwest Symposium on Circuits and Systems (MWSCAS), Cincinnati, OH, Aug 9-12, 2026.
MWSCAS'26
Modeling and Validation of Variation-Resistant Metal-Oxide Memristors via Kinetic Monte Carlo
Ismail Tirtom, Savas Kaya, Wyatt Saunders, Labib Yeamen, Zhewei Wang and Avinash Karanth
IEEE 69th International Midwest Symposium on Circuits and Systems (MWSCAS), Cincinnati, OH, Aug 9-12, 2026.
GLSVLSI'26
Process Identification and PUF Design Using CMOS Inverter Nonlinearity: Demonstration via 45nm & 22nm CMOS
Aakriti Barat, Savas Kaya, Avinash Karanth, Sunaim Abdullah, Soumyasanta Laha
ACM Great Lakes Symposium on VLSI (GLSVLSI), Finger Lakes, NY, June 22-24, 2026.
DATE'26
MONET: A Mixture-of-Experts Accelerator with a Multicast Optimized Two-Tier Network-on-Chip
Siqin Liu, Maya Roediger and Avinash Karanth
IEEE Design and Test in Europe (DATE), Verone, Italy, April 20-22, 2026 (Acceptance Rate ~ 25%)
ISQED'26
Carbon Emission-based Sustainability Model for Photonic Neural Network Accelerators
Siqin Liu, Avinash Karanth and Ahmed Louri
27th International Symposium on Quality Electronic Design (ISQED), San Francisco, CA, April 8-10, 2026.
HAIQ'26
Photon-Spin Quantum Computing Architecture
Zach Takacs, Wojciech, Jadwisienczak, Harsha Chenji and Avinash Karanth
2nd HPC/AI Integration with Quantum Computing/Networking (HAIQ 2026), Co-located with ASPLOS, Pittsburgh, PA, March 23, 2026.
2025
IEEE JETCAS
Extending Energy-Efficient and Scalable DNN Training and Inference with 3D Photonic Accelerator
Juliana Curry, Ahmed Louri, Avinash Karanth and Razvan Bunescu
IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), vol. 15, no. 4, pp. 560-576, December 2025.
DFT'25
Algorithmic Strategies for Sustainable Reuse of Neural Network Accelerators with Permanent Faults
Youssef Ait Alama, Sampada Sakpal, Ke Wang, Razvan Bunescu, Avinash Karanth and Ahmed Louri
38th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Barcelona, Spain, October 21-23, 2026. (BEST STUDENT PAPER)
IEEE TSUSC
GreeNX: An Energy-Efficient and Sustainable Approach to Sparse Graph Convolution Networks Accelerators using DVFS
Siqin Liu, Prakash Chand Kuve and Avinash Karanth
IEEE Transactions on Sustainable Computing (TSUSC), vol. 10, no. 5, pp. 1031-1042, Sept-Oct 2025.
QCE'25
Quantum Integrated Photonic Network-on-Chip for Manycore Architectures
Zach Takacs, Harsha Chenji and Avinash Karanth
IEEE International Conference on Quantum Computing and Engineering (QCE25), Albuquerque, New Mexico, Aug 31 - Sept 5, 2025. (BEST PAPER)
MWSCAS'25
Use of Current Spectroscopy for Process Authentication and Device Reliability
Aakriti Barat, Savas Kaya, Talha Furkan Canan, Ahmed Oun and Avinash Karanth
68th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Lansing, Michigan, August 10-13, 2025.
MWSCAS'25
Design and Verification of a Novel PUF for Enhanced IC Security Based on Total Harmonic Distortion in CMOS Inverters
Aakriti Barat, Savas Kaya, Ahmed Oun and Avinash Karanth
68th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Lansing, Michigan, August 10-13, 2025.
TSUSC
MERIT: A Sustainable DNN Accelerator Design with Photonic Phase Change Memory
Yuan Li, Ahmed Louri and Avinash Karanth
IEEE Transactions on Sustainable Computing (TSUSC), vol. 10, no. 4, July-August 2025.
VLSI Integration
Language Semantics to Support Secure Computation and Communication in Embedded Systems via Hardware Monitors
Garett Cunnigham, Siqin Liu, Harsha Chenji, David Juedes and Avinash Karanth
VLSI Integration, vol. 102, Special Issue on ASP-DAC'24, May 2025.
Frontiers
Three-Stage Spiking Neural Networks Fine-tuning for Brain Image Segmentation
Nidal Abuhajar, Zhewei Wang, Marc Baltes, Ye Yue, Li Xu, Avinash Karanth, Charles D. Smith, and Jundong Liu
Frontiers in Neuroscience, vol. 19, April 2025.
ISQED'25
Illuminati: A Simulation Framework for Modeling and Evaluating Photonic Neural Networks
Andy Wolff and Avinash Karanth
26th International Symposium on Quality Electronic Design (ISQED'25), San Francisco, CA, April 3-5, 2025.
2024
HiPC'24
Training Mach-Zehnder Meshes for Accelerating Photonic Neural Networks
Andy Wolff and Avinash Karanth
31st IEEE International Conference on High-Performance Computing, Data & Analytics (HiPC), Bengaluru, Dec 18-21, 2024.
GLSVLSI'24
HSCONN: Hardware-Software Co-Optimization for Self-Attention Neural Networks
Siqin Liu, Prakash Chand Kuve and Avinash Karanth
ACM Great Lakes Symposium on VLSI, Tampa Bay, FL, June 12-14, 2024.
GLSVLSI'24
SNAC: Mitigation of Snoop-Based Attacks with Multi-Tier Security in NoC Architectures
Siqin Liu, Saumya Chauhan and Avinash Karanth
ACM Great Lakes Symposium on VLSI, Tampa Bay, FL, June 12-14, 2024.
PAISE'24
PCM Enabled Low-Power Photonic Accelerator for Inference and Training on Edge Devices
Juliana Curry, Ahmed Louri, Avinash Karanth and Razvan Bunescu
6th Workshop on Parallel AI and Systems for the Edge, Co-located with IPDPS, San Fransisco, 27th May, 2024.
ISQED'24
SCORCH: Neural Architecture Search and Hardware Accelerator Co-design with Reinforcement Learning
Siqin Liu and Avinash Karanth
25th IEEE International Symposium on Quality Electronic Design (ISQED), San Francisco, CA, April 3-5, 2024.
TPDS
A High-Performance and Energy-Efficient Photonic Architecture for Multi-Tenant and Multi-Dataflow DNN Acceleration
Yuan Li, Ahmed Louri and Avinash Karanth
IEEE Transactions on Parallel and Distributed Systems, vol. 35, pp. 46-58, January 2024.
ASP-DAC'24
d-GUARD: Thwarting Denial-of-Service Attacks via Hardware Monitoring of Information Flow using Language Semantics in Embedded Systems
Garett Cunnigham, Harsha Chenji, David Juedes and Avinash Karath
29th Asia and South Pacific Design Automation Conference (ASP-DAC 2024), Incheon, South Korea, January 22-25, 2024. (Acceptance Rate = 140/483)
2023
Frontiers
Spiking Neural Networks Fine-tuning for Brain Image Segmentation
Ye Yue, Marc Baltes, Nidal Abuhajar, Tao Sun, Avinash Karanth, Charles Smith, Trevor Bihl and Jundong Liu
Frontiers in Neuroscience, Section Neuromorphic Engineering vol. 17, October 2023.
PACT'23
A Silicon Photonic Multi-DNN Accelerator
Yuan Li, Ahmed Louri and Avinash Karanth
32nd International Conference on Parallel Architecture and Compilation Techniques (PACT), Vienna, Austria, October 21-25, 2023.
ISCA'23
Flumen: Dynamic Processing in the Photonic Interconnect
Kyle Shiflett, Avinash Karanth, Ahmed Louri and Razvan Bunescu
50th IEEE International Symposium on Computer Architecture (ISCA), Orlando, FL, June 17-21, 2023. (Acceptance Rate = 72/379)
ISQED'23
DAGGER: Exploiting Language Semantics for Program Security in Embedded Systems
Garett Cunningham, David Juedes, Gordon Stewart, Harsha Chenji and Avinash Karanth
24th IEEE International Symposium on Quality Electronic Design (ISQED), San Francisco, CA, April 5-7, 2023.
SiP'23
Photonic Interconnect Based Neural Network Simulator
Andy Wolff, Kyle Shiflett and Avinash Karanth
IEEE Silicon Photonics Conference, Arlington, VA, April 4-7, 2023.
SIGCSE'23
Reflections of Cybersecurity Workshop for K-12 Teachers
Chad Mourning, David Juedes, Allyson Hallman-Thrasher, Harsha Chenji, Savas Kaya and Avinash Karanth
54th ACM Technical Symposium on Computer Science Education (SIGCSE'23), Toronto, Canada, March 15-18, 2023.
2022
ASH'22
Advanced Machine Learning Techniques Predict GvHD Occurrence and Severity with High Accuracy
Nicholas Yuhaz, Travis Me'Kayla, Kyle Shiflett, Elizabeth Greer Miller, Parvathi Ranganathan, Avinash Karanth and Hannah Choe
64th ASH Annual Meeting and Exposition, New Orleans, Louisiana, December 10-13, 2022.
TCAS-1
Exploiting Wireless Technology for Energy-Efficient Accelerators with Multiple Dataflows and Precision
Siqin Liu, Talha F. Canan, Harshavardhan Chenji, Soumyasanta Laha, Savas Kaya and Avinash Karanth
IEEE Transactions on Circuits and Systems - 1, vol. 69, no. 7, pp. 2742-2755, July 2022.
TCAS-1
ASCEND: A Scalable and Energy-Efficient Deep Neural Network Accelerator with Photonic Interconnects
Yuan Li, Ke Wang, Hao Zheng, Ahmed Louri and Avinash Karanth
IEEE Transactions on Circuits and Systems - 1, vol. 69, no. 2, pp. 2730-2741, July 2022.
SIGCSE'22
Reflections of Cybersecurity Workshop for K-12 Teachers and High School Students
Chad Mourning, David Juedes, Allyson Hallman-Thrasher, Harsha Chenji, Savas Kaya and Avinash Karanth
Proceedings of the 53rd ACM Technical Symposium on Computer Science Education (SIGCSE'22), v.2, pp. 1127, March 2022.
TETC
HREN: A Hybrid Reliable and Energy-Efficient Network-on-Chip Architecture
Padmaja Bhamidipati and Avinash Karanth
IEEE Transactions on Emerging Topics in Computing (TETC), vol. 10, no. 2, pp. 537-548, April-June 2022.
TPDS
SPRINT: A High-Performance, Energy-Efficient, and Scalable Chiplet-based Accelerator with Photonic Interconnects for CNN Inference
Yuan Li, Ahmed Louri and Avinash Karanth
IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 33, no. 2, pp. 2332-2345, October 2022.
HPCA'22
SPACX: Silicon Photonics-based Scalable Chiplet Accelerator for DNN Inference
Yuan Li, Ahmed Louri and Avinash Karanth
28th IEEE International Symposium on High-Performance Computer Architecture (HPCA-28), Seoul, South Korea, April 2-6, 2022. (Acceptance Rate = 80/262)
2021
IEEE JXCDC
Fine-Grain Reconfigurable Logic Circuits for Adaptive and Secure Computing via Work-Function Engineered Schottky Barrier FinFETs [PDF]
Talha F. Canan, Savas Kaya, Harsha Chenji and Avinash Karanth
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC), vol. 7, no. 2, pp. 150-158, December 2021.
HiPC'21
Dynamic Voltage and Frequency Scaling to Improve Energy-Efficiency of Hardware Accelerators [PDF]
Siqin Liu and Avinash Karanth
28th IEEE International Conference on High-Performance Computing, Data & Analytics (HiPC), Dec 17-18, 2021. (Acceptance Rate = 37/157 = 23%)
(Nominated for Best Paper Award)
ICCD'21
WiNN: Wireless Interconnect based Neural Network Accelerator
Siqin Liu, Sushanth Karmunchi, Avinash Karanth, Soumyasanta Laha and Savas Kaya
39th International Conference on Computer Design (ICCD), October 24-27, 2021. (Acceptance Rate = 60/246 = 24%)
IPC'21
Parallel Dot Product using Silicon Photonics
Andy Wolff, Kyle Shiflett and Avinash Karanth
IEEE Photonics Conference (IPC), Oct 18-21, 2021.
ISCA'21
Albireo: Energy-Efficient Acceleration of Convolutional Neural Networks via Silicon Photonics
Kyle Shiflett, Avinash Karanth, Ahmed Louri and Razvan Bunescu
48th International Symposium on Computer Architecture (ISCA), June 14-19, 2021. (Acceptance Rate = 76/405 = 18%)
GLSVLSI'21
Bitwise Neural Network Acceleration using Silicon Photonics
Kyle Shiflett, Avinash Karanth, Ahmed Louri and Razvan Bunescu
31st ACM Great Lakes Symposium on VLSI, June 22-25, 2021.
DAC'21
Scaling Deep Learning Inference with Chiplet-based Architecture and Photonic Interconnects
Yuan Li, Ahmed Louri, and Avinash Karanth
58th Design Automation Conference (DAC), San Fransisco, Dec 2021.(Acceptance Rate = 215/916 = 23%)
HPCA'21
CSCNN: Algorithm-Hardware Co-Design for CNN Accelerators using Centrosymmetric Filters
Jiajun Li, Ahmed Louri, Avinash Karanth and Razvan C. Bunescu
27th IEEE International Symposium on High-Performance Computer Architecture (HPCA-21), Feb 27 - March 3, 2021. (Acceptance Rate = 63/258 = 24%)
HPCA'21
GCNAX: A Flexible and Energy-efficient Accelerator for Graph Convolutional Neural Network
Jiajun Li, Ahmed Louri, Avinash Karanth and Razvan C. Bunescu
27th IEEE International Symposium on High-Performance Computer Architecture (HPCA-21), Feb 27 - March 3, 2021. (Acceptance Rate = 63/258 = 24%)