ARPERS in the News

Contention for the shared cache in a chip multiprocessor (CMP) can have non-uniform impacts on threads of different applications, degrading performance and quality of service. Thus, modeling the impact of this contention is of key importance to processor designers. Until this paper, it had not been well understood what influenced application performance sensitivity to cache sharing, and  there had been no simple way to model this contention. This paper demonstrated techniques based on previous work in cache modeling to estimate with great accuracy the impact of inter-thread contention. The models use the isolated L2 cache stack distance or circular sequence profile of each thread, which reveal how thread temporal locality interacts with cache sharing, and the models can be computed with significantly lower overhead than simulating the CMP. This paper has had a great deal of impact since its publication, garnering 746 citations according to Google Scholar as of this writing. It has influenced thoughts on cache partitioning, cache replacement policy, thread scheduling, processor design for datacenters, virtual machine organization, quality of service in memory system design, and other areas. Four patents have been issued citing this paper as prior art in estimating resource contention in memory systems, indicating industry impact.

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