Home

I earned my B. Tech and M. Tech in ECE from IIT Kharagpur, India in 2004 and 2005 respectively. I pursued graduate studies at Georgia Institute of Technology, Atlanta, USA from 2006 to 2010. I received a M.S. in Mathematics in May 2009 and a Phd in ECE in May 2010.

This site is old - my latest website is at http://www3.ntu.edu.sg/home/arindam.basu/

My research interests span a broad range of topics ranging from bifurcations and chaos in neural circuits to reconfigurable silicon systems for sensor interfacing and analog signal processing. Some of my main focus topics are:

• Reconfigurable Low-power Mixed Signal Design:

As VLSI process technology scales to lower process nodes, the yield of chips is reducing drastically due to statistical variations. Also, power dissipation

constraints are starting to limit the future of scaling according to Moore's Law. To cope with these issues, a paradigm shift is needed in terms of architectures

for signal processing. We will explore novel methods of reducing power dissipation in several portable applications that require a lot of processing (e.g. real time

control of autonomous robots, hearing-aids). Methods of processing the signal in analog prior to digitization will be one of the key techniques to reduce digital

processing overhead. This can also reduce the burden on the ADC (e.g. cortical implant systems). We will use low-power, subthreshold analog techniques to

perform efficient signal processing systems like frequency decomposition, beam-forming etc. To combat the effect of increased mismatch in lower CMOS processes,

we will use analog non-volatile memory transistors for trimming. These floating-gate devices will also be used to impart reconfigurability to the designs. We will also

explore the design of improved FPAA structures for smart sensory systems with applications to processing in hearing-aids or beam-forming for Intra-vascular

Ultrasound (IVUS) applications.

• Biological sensor interfacing:

Acquiring signals from the brain is extremely important for understanding brain function and providing potential cure for brain diseases and abnormal function

(e.g. epilepsy). In general, interfacing with neurons can be broadly categorized in two classes: Extracellular and Intracellular Electrophysiology.

In extracellular methods, we will focus on neural signal recording from implants in the brain. These systems need to record uV level signals in the range of

1-100 Hz from hundreds of electrodes in parallel while dissipating minimal power (to avoid tissue damage). This signal needs to be eventually digitzed and

transmitted off-chip wirelessly. We will focus on novel, micropower signal acquisition and conditioning circuits/techniques to reduce the burden on the ADC.

In intracellular methods, we will focus on design of an IC for voltage, current and dynamic clamp protocols. Here the signal levels are higher (in the mV range),

but need more sophisticated stimulating patterns using non-linear, time variant voltage-current converters (mimicking biological ion-channels). Departing from

traditional FPGA based systems, we will develop configurable analog solutions to the problem. Being analog in nature, it can be expanded to multiple parallel

channels without facing a bottleneck due to central processing or digitization. We will study the stability constraints of digital dynamic clamp systems due to

the processing delay and improve it in the analog one.

• Mathematical and Electronic modeling of neural dynamics:

I am interested in exploring bipedal locomotion controlling circuits like Central Pattern Generator as well as cortical information processing in networks of

Hopf or Saddle neurons linked together by STDP learning synapses. We will develop ICs that can be used as an analog coprocessor for simulations

as well as for implants or controllers for autonomous robots. These bio-mimetic ICs will be very power efficient by using sub-threshold design. To scale the

system up to the level of thousands of neurons and millions of interconnects spread across multiple chips, we will use an asynchronous digital communication

scheme. This project will also explore the usage of analog non-volatile memory programming (using quantum mechanical processes of electron tunneling and

injection) for reducing the effect of statistical variations, a problem plaguing current state-of-the-art CMOS processes.

• Spike based processing:

Develop a platform for exploring asynchronous digital communication protocols like Address Event Representation(AER). In the context of neuro-mimetic chips,

the asynchronous signal comes from a neuron (its output spike is like a digital pulse) that converts its input signal into a meaningful timing of the pulse. This leads

to an efficient VLSI representation as well since this method can allow power supply scaling to reduce power dissipation. We will explore spike processing

algorithms and interface it with an AER based sensor (vision/audition) for object recognition/pattern classification etc.

• Information processing at single cell level:

I am interested in the computation occurring at the level of single neuronal cells; in particular I want to study the role of active dendrites and explore its

similarities with Hidden Markov Model based classifiers and the role of bifurcations in determining intrinsic computational properties. We will design low-power,

bio-mimetic ICs using subthreshold circuits to make bio-physically realistic models and use them in conjunction with theoretical and computer simulation based

studies.

NEWS

I am hiring a Ph.D. student for Spring 2011. Interested candidates can contact me with their CV. Prior knowledge of Mixed signal IC design or neuroscience

or dynamical systems will be helpful.