Research and Training

Research:

Doctoral Researcher at Vanderbilt University, Nashville Tennessee, USA

Duration: August 2021 - Present

Topic: Radiation Effects in High Power SiC devices

Advisor: Prof. (Dr.) Arthur Witulski 

Research partially funded by the NASA Lunar Surface Technology Research (LuSTR) Program grant at Vanderbilt University from Aug 2021 through Dec 2023. 

Graduate Researcher at University at Albany, SUNY, Albany,  New York, USA

Duration: May 2020 - July 2021

Topic: Characterization of Wide-Bandgap SiC Field Effect Transistors and their Active Gate Driving Circuit in High Power Applications (M.S. Thesis)

Advisor: Prof. (Dr.) Mohammed Agamy

Abstract: In this research, the characterization of two similarly rated commercially available SiC devices - a trench MOSFET and a cascoded JFET are done. It is followed by a comparative analysis of both devices. Firstly, a Conventional Gate Drive (CGD) circuit is implemented, followed by the proposal and implementation of an Active Gate Driver (AGD) circuit. Both the devices are characterized for the CGD and AGD topologies to predict whether the proposed circuit improves the device performance, based on dI/dt and dV/dt characteristics. Switching characteristics during turn-on and turn-off for both the CGD and AGD topologies are compared and it is observed that the proposed AGD circuit does minimize the switching losses. The proposed AGD topology follows a simple design of using an N-channel MOSFET (NMOS) with a series resistor in parallel with the turn-on branch and a P-channel MOSFET (PMOS) with a series resistor in parallel with the turn-off branch of the gate driver circuit of the device under test (DUT). Characterization of the DUT is done using SPICE models of the devices for a comparative study. It is followed by the design of a printed circuit board (PCB) to implement both the CGD and AGD topologies which is compatible with both the DUTs. The DUTs are chosen as such that their characteristics are very similar to one another for an accurate comparative analysis. The devices are tested at rail voltages from 200V to 800V and at inductor currents from 10A to 60A. A detailed analysis shows a reduction in switching losses and shortening of the miller plateau in the proposed AGD circuit when the switching is made faster whereas over-voltage and over-current reduction when the switching is slowed down. Thus the proposed AGD circuit can be used to either speed up switching to minimize losses or slow down switching to mitigate noise issues dynamically during circuit operation, which was the intended purpose of this research. 

Summer Research Intern at New Jersey Institute of Technology, Newark, New Jersey, USA

Duration: June 2016 - August, 2016

Topic : Investigating the reliability of high-k gate dielectrics on germanium substrates for nanoscale CMOS devices

Mentor: Dr. M.N.U. Bhuyian, Dr. Yiming Ding

Advisor: Prof. (Dr.) Durgamadhab Mishra 

Abstract: In this work, we have investigated metal/Hf1-xZrxO2/Al2O3/Ge metal oxide semiconductor (MOS) capacitors with six different Zr/(Hf+Zr) content (0%, 25%, 33%, 50%, 75%, and 100%) in the dielectrics. The dielectrics were subjected to slot-plane-antenna plasma (SPAO) treatment during the deposition process and compared with the control HfO2 without any SPAO treatment. Capacitance voltage (C-V) and conductance voltage (G-V) characteristics were studied for all of the devices using a 4284A LCR meter and a cascade probe station. The equivalent oxide thickness (EOT), flat-band voltage (Vfb), interface state density (Dit), C-V hysteresis, and oxide trapped charge (Qtrapped) were estimated from the experimental results. Current voltage (I-V) characteristics were studied using the Probe Station and HP 4156B Semiconductor Parameter Analyzer to compare the leakage current densities (Jg) for various compositions of Zr.

Final Credit: 4.0 (out of 4.0) 


Undergraduate Researcher at Heritage Institute of Technology, Kolkata, India

Duration: August 2016 – June 2017 

Topic: Study of MOSFET in Harsh Environmental Conditions 

Advisor: Prof. (Dr.) Srabanti Pandit

Abstract: In this project, we have compared various parameters like the oxide field, barrier potential, and radiation dosage to observe their dependence on leakage current density. It is seen that the performance of a MOSFET device depends on the amount of leakage current produced by it, less the leakage current better it is. Hence to minimise the effects of radiation in leakage current generation, we equate and plot the above parameters. It is observed that the equation holds true for all the cases and hence their dependence is correctly depicted. For optimal performance of devices, less oxide field (around 5.5MV/m) and more barrier potential (around 3.2eV) is helpful and it reduces the dependence on environmental radiation for leakage in device.

Final Credit: 10.0 (out of 10.0) and 9.0 (out of 10.0)  

Training:

Trainee at the Texas A&M University Single-Event Effects (SEE) Bootcamp

Duration : Mar, 2023

Organized by Texas A&M University, NASA GSFC, JPL, Space Micro, Renesas, & Northrop Grumman 


Winter Trainee under E.T.C.E Department of Jadavpur University on "Microelectronics Technology and VLSI Design"

Duration : Dec, 2015 - Jan, 2016

Modules covered: [1] VLSI Design using EDA Tools - a) Introduction to EDA Tools, b) Basic gates design using Schematic Capture, c) Netlisting Using T-Spice, d) Verification of design using waveform editor, e) Layout design using L-edit.

[2]Design Verification Using VHDL and FPGA Implementation of Digital Systems - a) Introduction to Digital Systems Modelling using VHDL, b) Verification of Digital Systems Design using ModelSim, c) Synthesis of Digital system using Xilinx ISE tool, d) Realization of digital systems on a Xilinx Spartan 3 board, e) Notion of RTL and Technology Schematic and Power Simulation

[3]Fabrication and Characterization of semiconductor devices, a) Mask Fabrication, b) Theoretical Simulation, c) Hardware fabrication for all process of Microelectronics: cleaning, etching, oxidation, diffusion, photolithography and Metallization,    d) Characterization of fabricated IC and Schottky Diode.

Final Grade : A 


Summer Trainee at MicroPro on "Microcontroller based system development using Embedded C”

Duration : Jul, 2015

Modules covered: Basics of AT89C51 microcontroller, Introduction to embedded C programming, Operations with peripherals and 7 segment display using KEIL software, Array calling, Bitwise operations, Use of pointers, Using an 16x2 LCD display and final project of creating a digital thermometer using LCD display.