Day 1 - Aug 28 (Wed)
9:30 - 11:00 Opening session - session lead: Kazutomo Yoshii (ANL)
Short motivational and position talk or recent update presented by:
Makoto Taiji (RIKEN), Kentaro Sano (RIKEN), Tomohiro Ueno (RIKEN)
Jeff Vetter (ORNL), John Shalf (LBNL), Rajesh Sankaran (ANL)
11:00 - 13:00 Lunch (the food truck is recommended) + open discussion
13:00 - 14:30 Tooling session (Design, Simulation, Emulation, EDA, PDK) - session lead: John Shalf (LBNL)
Farzad Fatollahi-Fard (LBNL), “Berkeley eXtensible Environment: An Emulation-As-A-Service Platform”
George Michelogiannakis (LBNL), “Chiplets into HPC: Initial thoughts and OCP efforts”
Abe Gonzalez (UCB), “FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation Recap and Updates”
Jerry Zhao (UCB), “Emerging Capabilities in Chipyard for HPC and Scientific Edge Computing”
Shinobu Miwa (UEC/RIKEN), “Design Challenges of CNFET Processors”
14:30 - 15:00 Break
15:00 - 16:30 Edge session (near-sensor custom hardware, stream processing) - session lead: Rajesh Sankaran (ANL)
Anastasiia Butko (LBNL), “Scientific Edge Computing: AI-Enabled Object Tracking for Radiological Source-Object Attribution on FPGA”
Sebastian Strempfer (ANL), “Digital implementation and design methodology of the SparkPix-RT2 X-ray detector ASIC”
Senthil Murugan Gnanasekaran (ANL), Sam Fowler (ANL), “Integrating an AI Accelerator with FPGA for Real-Time X-ray data analysis”
Ryan Herbst (SLAC), “Edge data processing using FPGA based ML inference in LCLS”
Tomohiro Ueno (RIKEN), "Explore bandwidth compression hardware for various data sets"
18:00 - Dinner at Jupiter, downtown Berkeley: https://www.yelp.com/biz/jupiter-berkeley
Day 2 - Aug 29 (Thu)
9:30 - 11:00 AI hardware session (DNN, SNN, hardware algorithms) - session lead: Angel Yanguas-Gil (ANL)
Narsinga Rao Miniskar (ORNL), “Neurospark: Ultra-fast Spiking Neural Network Accelerator”
Aaron Young (ORNL), “Neuro-Spark: A Submicrosecond Spiking Neural Networks Architecture for In-Sensor Filtering”
Anthony Cabrera (ORNL), “Mapping PyTorch to Reconfigurable AMD Backends using Vitis AI”
Kazi Asifuzzaman (ORNL), “Leveraging novel memory architectures to accelerate SNNs”
Angel Yanguas-Gil (ANL), “Happy together: training and exploration of hardware-aware SNNs for on-detector data processing”
Akira Jinguji (RIKEN), “AI Sparsification and Hardware”
11:00 - 13:00 Lunch (the food truck is recommended) + open discussion
13:00 - 14:30 Architecture session (CGRA, dataflow, chiplet) - session lead: Kentaro Sano (RIKEN)
Angelos Iannou (LBNL), “MoSAIC: Modular System for Acceleration Integration in HPC using programmable logic”
Mohamed E. Aly (CPP), “Resource-Efficient Cryptography and Secure IoMT: Enhancing Embedded Systems with Post-Quantum and Multi-Clock Domain Optimizations”
Masaaki Kondo (RIKEN), “Architecture Design for the Zetta-Scale Era”
Boma Adhi (RIKEN), "Unleashing CGRA's Potential for HPC"
Toru Niina (RIKEN), "Development of MDG5: a special-purpose computer for molecular dynamics simulation"
14:30 - 15:30 Wrap-up discussion
Summarize Key Goals (takeaways)
outcomes, research direction, current capabilities, identified capabilities/issues
Identify action items, next steps
Plan next meeting or events
15:30 - 17:00 Popup meetings/sidebar
set aside this time slot for individual meetings between the attendees