ARCHIDE: Workshop on Architecture Design Methodologies and Ecosystems for HPC and Scientific Edge Computing

The demand for specialized architectures and innovative approaches is growing to sustain performance and energy efficiency gains in the post-Moore era of high-performance and scientific edge computing. In the realm of scientific instruments, the development of custom and specialized accelerators is crucial for advancing scientific discoveries. This workshop aims to explore topics and opportunities in innovative architectural approaches, hardware design languages, simulation, emulation, verification methodologies and tools, emerging accelerators and architectures, compiler stacks, programming paradigms, and relevant application areas. Participants will present their recent research interests and activities in these fields. Additionally, we aim to facilitate the exchange of research ideas among participants, promoting collaborative discussions in line with DOE/MEXT collaborations.

The topics of interests include but are not limited to:

• Open-source hardware tool ecosystems

  • Chisel, Firesim, Verilator, cocotb, OpenRoad, Chipyard, MoSAIC, etc.

• Custom hardware designs (ASIC, FPGA)

  • HPC/AI accelerator designs

  • near-detector data processing hardware designs for X-ray science, high-energy physics, quantum computing, etc

    • compression, deep neural network, spiking neural network

    • surface codes for quantum computing error correction

  • tight-integration with AI accelerators such as Groq 

  • 5G acceleration designs

• Common research testbeds/resources and source-code repositories

  • Chameleon cloud, an experimental testbed for computer science, for example

• Discussions about collaborations

  • future events/workshop

  • potential roadblocks such as NDA, licenses, resources

 Organizers: Kazutomo Yoshii (ANL), Kentaro Sano (RIKEN), John Shalf (LBNL), Jeff Vetter (ORNL), Rajesh Sankaran (ANL)