I am a Ph.D. Researcher with imec, Belgium & Vrije Universiteit Brussel. Additionally, I am a recipient of the prestigious FWO PhD Fellowship & J.N. Tata Scholarship. Before joining imec, I was with Rambus Inc. as Member of Technical Staff (MTS)-Analog Engineering, designing analog circuit blocks of transceiver chips that facilitate interfacing between RAM and the processor.
I completed my graduate studies in the Microelectronics and VLSI Design M.Tech program at Indian Institute of Science (IISc), Bangalore, with a dissertation based on the switching reliability of AlGaN/GaN HEMTs. Previously, I completed my bachelor's degree in Electrical Engineering at the National Institute of Technology (NIT) Patna, India, with a dissertation based on developing a unified charge centroid model for III-V compound semiconductors and Silicon-based Multi-Gate FETs.
I often pursue dilettante interests in tech history and economics. My recently read books can be found here: Books
Ph.D. in Engineering Sciences, imec Belgium & Vrije Universiteit Brussel, Belgium (2023 onwards)
M.Tech in Microelectronics & VLSI Design, Indian Institute of Science (IISc) Bangalore, India (2020 -22)
B.Tech in Electrical Engineering, National Institute of Technology(NIT) Patna, India (2014 - 18)
PhD Researcher, imec Belgium (Oct 2023 - Present)
Member of Technical Staff (MTS) - Analog Engineering, Rambus Inc (Aug 2022 - Sept 2023)
Research Associate, IIT Gandhinagar (Oct 2018 - June 2019)
Research Assistant, IIT Gandhinagar (July 2018 - Sept 2018)