A Chronological Collection of Sixty-five Papers on Switching Theory and Logic Design by Prof. Arun K. Choudhury

1. A. K. Choudhury, “Application of Boolean Algebra to the Design of Switching Circuits,” IETE Journal of Research, Volume 5, 146 – 151, 1959.

2. A. K. Choudhury, M. S. Basu, and S. R. Das, “On adaptation of the grouping chart and simplification of multiple-output switching functions,” - Indian J. Phys, 1962.

3. A. K. Choudhury and M. S. Basu, “A Mechanized Chart for Simplification of Switching Functions,” IRE Trans. Electron. Comput., 11(5): 713-714, 1962.

4. M. S. Basu , S. R. Das, and A. K. Choudhury, “A Chart Method for the Determination of one of the Minimal Forms of a Switching Function,” Journal of Electronics and Control, Vol. 16, 425 – 440, 1964.

5. A. K. Choudhury, S. R. Das, “Direct Determination of all the Minimal Prime Implicant Covers of Switching Functions,” Journal of Electronics and Control, Volume 17, 553 – 576, 1964.

6. A. K. Choudhury, S. R. Das, and M. S. Basu, “A new approach to the solution of switching functions having cyclic prime implicant tables,” Indian J. Phys., 38(47), 31-48, 1964.

7. A. K. Choudhury and S. R. Das, “On a method of determination of one of the minimal solutions of switching functions by utilizing their connected cover term matrices,” Int. J. Control, I. Ser. 1, 565-583, 1965.

8. A. K. Choudhury and S. R. Das, “On a method of obtaining all the irredundant covers of switching functions by utilizing their connected cover term matrices,” Int. J. Control, I. Ser. 1, 585-597, 1965.

9. A. K. Choudhury and S. R. Das, “Some studies on connected cover term matrices of switching functions,” Int. J. Control, I. Ser. 2, 441-501, 1965.

10. A. K. Choudhury and S. R. Das, “Some further studies on determination of all the minimal prime implicant covers of switching functions,” Int. J. Control, I. Ser. 2, 587-608, 1965.

11. S. R. Das and A. K. Choudhury, “Maxterm Type Expressions of Switching Functions and Their Prime Implicants,” IEEE Trans. Electron. Comput., 1965.

12. D. Sarma, S. R. Das, A. K. Choudhury, “On a method of decomposition of Boolean functions into unate functions for synthesis with threshold logic elements,” Int. J. Control, I. Ser. 4, 365-393 (1966).

13. A. K. Choudhury, D. Sarma, S. R. Das, “A method for testing and realization of threshold functions through classification of inequalities,” Int. J. Control, I. Ser. 4, 515-547 (1966).

14. A. K. Choudhury and S. R. Das, “Computing irredundant normal forms from abbreviated presence functions,” IEEE Trans. Electron. Comput., 15(3): 387, 1966.

15. K. K. Roy and A. K. Choudhury, “A Note on Testing and Realization of Threshold Functions,” IEEE Trans. Electron. Comput.,15(2): 242-244, 1966.

16. A. K. Choudhury and S. R. Das, “Comment on "Detection of Totally Symmetric Boolean Functions”,”IEEE Trans. Electron. Comput. 15(5): 813 (1966).

17. S. R. Das, K. K. Roy, and A. K. Choudhury, “Simplification of Switching Functions Involving a very Large Number of ‘Don't Care’ States,” International Journal of Control, Volume 3, 17-28, 1966.

18. D. Sarma, S. R. Das, and A. K. Choudhury, “Standard Test Set for Testing and Realization of Threshold Functions,” International Journal of Control, Volume 6, 433 – 446, 1967.

19. A. K. Choudhury, D. Sarma, and S. R. Das, “Minimal Third-order Expressions of Boolean Unate Functions,” International Journal of Control, Volume 6, 447 – 459, 1967.

20. A. K. Choudhury, K. K. Chakrabarti, and D. Sarma, “Some Studies on the Problem of Three-level NAND Network Synthesis,” International Journal of Control, Volume 6, 547 – 572, 1967.

21. A. K. Choudhury and D. Sarma, “Decomposition of Boolean function and two-realizability,” International Journal of Control, Volume 8, 375 – 392, 1968.

22. A. K. Choudhury and K. K. Chakrabarti, “Studies on some aspects of the problem of three-level NAND network synthesis,” International Journal of Control, Volume 10, 393 – 411, 1969.

23. D. Sarma, D. Basu, S. Ghosh, and A. K. Choudhury, “Realization of Boolean functions with a large number of unspecified states by a single threshold logic element,” International Journal of Control, Volume 10, 559 – 571, 1969.

24. Sukumar Ghosh, Dhruba Basu, and A. K. Choudhury, “Multi-gate Synthesis of General Boolean Functions by Threshold Logic Elements,” IEEE Trans. Computers, 18(5): 451-456 (1969).

25. S. C. De Sarkar, A. K. Basu, and A. K. Choudhury, “Simplification of Incompletely Specified Flow Tables with the Help of Prime Closed Sets,” IEEE Trans. Computers, 18(10): 953-956, 1969.

26. K. K. Chakrabarti, A. K. Choudhury, and M. S. Basu, “Complementary Function Approach to the Synthesis of Three-Level NAND Network,” IEEE Trans. Computers, 19(6): 509-514 (1970).

27. S. C. De Sarkar, A. K. Basu, and A. K. Choudhury, “On the Determination of Irredundant Prime Closed Sets,” IEEE Trans. Computers, 20(8): 933-938 (1971)

28. Sukumar Ghosh and A. K. Choudhury, “Cascaded multi-threshold networks,” IEEE Trans. Comput., 20, 655-662 (1971).

29. S. Bandyopadhyay, S. Basu, and A. K. Choudhury, “A cellular permuter array,” IEEE Trans. Comput., 21, 1116-1119 (1972).

30. S. Ghosh, S. Bandyopadhyay, S. K. Mitra, and A. K. Choudhury, “Simple methods for the testing of 2-summability of Boolean functions and iso-baricity of threshold functions,” IEEE Trans. Comput., 21, 503-507 (1972).

31. Subir Bandyopadhyay, S. Basu, and A. K. Choudhury, “An Iterative Array for Multiplication of Signed Binary Numbers,” IEEE Trans. Computers, 21(8): 921-922, 1972.

32. S. C. De Sarkar, S. Bandyopadhyay, A. K. Choudhury, and S. Ghosh, “Simplification of AND, EXCLUSIVE-OR Switching Function,” IETE Journal of Research, Volume 18, 464 – 466, 1972.

33. S. Bandyopadhyay and A. K. Choudhury, “An Iterative Cellular Array for Non-restoring Square Root Extraction,” IETE Journal of Research, Volume 19, 169 – 170, 1973.

34. Prabuddha De, Subir Bandyopadhyay, Arunabha Sen, and A. K. Choudhury, “A Generalized Cellular Array for Digital Communication,” IETE Journal of Research, 19:7, 372-377, 1973.

35. A. K. Basu, A. Sengupta, S. Bandyopadhyay, and A. K. Choudhury, “A Method for Handwritten Type Numeric Display on Cathode Ray Tube Screen”, IETE Journal of Research, 19:10, 531-538, 1973.

36. Sukumar Ghosh and A. K. Choudhury, “Partition of Boolean functions for realization with multi-threshold threshold logic elements,” IEEE Trans. Comput., 22, 204-215, 1973.

37. P. De, A. Sen, A. Pal, D. Sarma, and A. K. Choudhury, “Minimal realization of arbitrary switching functions with 2-level networks of iso-distinct and iso-baric threshold gates,” Int. J. Systems Sci., 5, 555-573, 1974.

38. P. De, A. Pal, A. Sen, D. Sarma, and A. K. Choudhury, “A tabular method for finding 2-summable and mutually 2-summable pairs of minterms,” International Journal of Electronics, Volume 37, 409 – 427, 1974.

39. A. Sen, S. Bandyopadhyay, P. De, D. Sarma, and A. K. Choudhury, “A self-repairable threshold cellular array,” International Journal of Electronics, Volume 37, 727 – 736, 1974.

40. A. Sengupta, D. K. Chattopadhyay, A. K. Choudhury, “Linearity testing and realization of sequential machines,” IEEE Trans. Comput., 23, 524-528 (1974).

41. S. C. De Sarkar, S. Bandyopadhyay, and A. K. Choudhury, “Unate cascade realization of synchronous sequential machines,” IEEE Trans. Comput., 23, 1008-1019 (1974).

42. S. Bandyopadhyay, S. R. Das, S. Basu, and A. K. Choudhury, “Synthesis of arrays of Maitra cascades,” Proc. 7th Ann. Asilomar Conf. Circuits, Syst., Comput., Pacific Grove, 1973, 450-454 (1974).

43. D. K. Chattopadhyay, A. Sengupta, A. K. Choudhury, “On shift register realization of sequential machines,” Int. J. Systems Sci., 5, 1007-1024 (1974).

44. A. Palit, S. Pal, M. S. Basu, and A. K. Choudhury, “An Easy Method for Finding the Boolean Difference,” IETE Journal of Research, Volume 20, 209 – 213, 1974.

45. S. Bandyopadhyay, A. Pal, and A. Choudhury, "Characterization of Unate Cascade Realizability Using Parameters";, IEEE Transactions on Computers, vol. 24, no. 02, pp. 218-219, 1975.

46. S. C. De Sarkar, D. K. Chattopadhyay, A. Sen Gupta, and A. K. Choudhury, “Secondary state assignment using connected matrices,” Int. J. Systems Sci., 6, 443-464 (1975).

47. A. Palit, A. Sen Gupta, M. S. Basu, and A. K. Choudhury, “On the design of fault diagnostic networks for combinational logic circuits,” International Journal of Electronics, Volume 38, 25 – 32, 1975.

48. A. Pal, A. Palit, S. Pal, M. S. Basu, and A. K. Choudhury, “Fault Detection in a Two-Level Negative Gate Network,” IETE Journal of Research, Volume 21, 58 – 65, 1975.

49. A. Sen Gupta, D. K. Chattopadhyay, A. Palit, A. K. Bandyopadhyay, M. S. Basu, and A. K. Choudhury, "Realization of Fault-Tolerant and Fail-Safe Sequential Machines",IEEE Transactions on Computers, vol. 26, no. 01, pp. 91-96, 1977.

50. B. P. Sinha, P. K. Srimani, and A. K. Choudhury, "Some studies on optimal specification of read-only memories in microprogrammed digital computers", Journal of IETE, Vol. 23, pp. 535-541, September 1977 (S. K. Mitra Memorial award-winning paper).

51. P. K. Srimani, B. P. Sinha, and A. K. Choudhury, "On certain investigations on control memory minimization in microprogrammed digital computers", Journal of IETE, Vol. 23, pp. 542 - 548, September 1977 (S. K. Mitra Memorial award-winning paper).

52. P. K. Srimani, B. P. Sinha, and A. K. Choudhury, "Non-real time realization of any finite-state sequential machine using a single shift register", Proceedings of the IEEE, Vol. 65, pp. 1618-1619, November 1977.

53. B. P. Sinha, P. K. Srimani, A. K. Choudhury, A. Sen, A. R. Dasgupta, and M. K. Chakrabarti, "Testing of the static and dynamic performance characteristics of a 4-bit AM-2505 multiplier chip in 8-bit by 8-bit configuration,” Proceeding of the National Seminar on Testing and Evaluation, Calcutta, India, January 1977, pp. s:1/EC/8/1-12.

54. P. K. Srimani, B. P. Sinha, and A. K. Choudhury, "Single shift register realizability of any arbitrary sequential circuit", Proceedings of Twentieth Midwest Symposium on Circuits and Systems, Texas, 1977, pp. 86-89.

55. Ranjan Kumar Sen, Ajit Pal, and A. K. Choudhury, “A Programmable Logic-State Analyser IETE Journal of Research,” Volume 23, 434 – 439, 1977.

56. B. P. Sinha, P. K. Srimani, and A. K. Choudhury, "A new address calculating technique in microprogrammed digital computers,” Proceedings of National Systems Conference, Ludhiana, India, September 1978, pp. 117-120.

57. P. K. Srimani, B. P. Sinha, and A. K. Choudhury, "An address generation scheme to minimize the control memory requirements in microprogrammed digital computers,” International Journal of Electronics, Vol. 48, pp. 457-470, June 1980.

58. P. K. Srimani, B. P. Sinha, and A. Pal, "Fail-safe realisation of sequential machines with a two-level MOS module,” Computers and Electrical Engg., (Pergamon Press), Vol. 7, pp. 163-173, 1980.

59. A. Sengupta, A. Palit, A. Bandyopadhyay, D. K. Chattopadhyay, and A. K. Choudhury, "Realization of Fault-Tolerant Machines - Linear Code Application", IEEE Transactions on Computers, vol. 30, no. 03, pp. 237-240, 1981.

60. Bhargab B. Bhattacharya, Bidyut Gupta, and A. K. Choudhury, “Generalized circuit signature of combinational logic circuits,” Proc., Foundations of Software Technology and Theoretical Computer Science (FST & TCS) – 1, Bangalore, India, 1981, pp. 167-178.

61. B. Gupta, B. B. Bhattacharya, and A. K. Choudhury, “A switching-theoretic approach to information compression and its unambiguous retrieval,” Advances in Information Science and Technology, vol. II, Indian Statistical Institute, Calcutta, pp. 155-164, 1982.

62. Bhargab B. Bhattacharya, Bidyut Gupta, and A. K. Choudhury, “Optimal interconnection in digital systems satisfying concurrency constraints,” Int. J. Syst. Sci., vol. 15, pp. 991-999, 1984.

63. Bhargab B. Bhattacharya, Bidyut Gupta, Satyabrata Sarkar, and A. K. Choudhury, “Design of Exclusive-OR Sum-of-Products (ESP) logic arrays with universal tests for detecting stuck-at and bridging faults,” Comput. Electr. Engg., vol. 11, pp. 67-78, 1984.

64. Bhargab B. Bhattacharya, Bidyut Gupta, Satyabrata Sarkar, and A. K. Choudhury, “Testable design of RMC networks with universal tests for detecting stuck-at and bridging faults,” IEE Proceedings - Computers and Digital Techniques (Part E), vol. 132, no. 3, pp. 155-162, May 1985.

65. P. K. Datta, S. K. Bandyopadhyay, and A. K. Choudhury, “A graph-theoretic approach for state assignment of asynchronous sequential machines,” International Journal of Electronics, Volume 65, 1067 – 1075, 1988.

Significant Publications of Prof. Choudhury on Analog Computers, Circuit Theory and Control Systems

Analog Computers:

1. B. R. Nag and A. K. Choudhury, “R-C Network analogue” Ind J. Physics, 31, pp. 121-134, 1957.

2. B. R. Nag and A. K. Choudhury, “An electronic differential analyser”, Ind J. Physics, 32, pp. 91-108, 1958.

Circuit Theory:

3. S. Chakrabarty and A. K. Choudhury, “Transistor-resistor realizations of negative resistance circuits employing two ideal transistors”, International Journal of Electronics, Volume 30, 1971.

4. S. Chakraborty and A. K. Choudhury, “ An S-type negative resistance circuit without any internal bias supply “, IETE Journal of Research, Vol. 17, Issue 4, pp. 118-120, 1971.

Control Systems:

5. N. G. Nath, A. K. Bhattacharyya and A. K. Choudhury, “Transient Response Improvement of Serve Systems by Discrete Control of Parameter”, Journal of Electronics and Control, Volume 17, 1964.

6. N. G. Nath , A. K. Bhattacharyya and A. K. Choudhury, “A Method of Obtaining Dead-beat Response of Third-order Servo Systems”, International Journal of Control, Volume 1, 1965.

7. N. G. Nath,  A. K. Bhattacharyya and  A. K. Choudhury, “Dead-beat Control of Third-order Servo-systems”, International Journal of Control, Volume 2, 1965.

8. A. K. Bhattacharyya and A. K. Choudhury, “Third-order Feedback Control Systems—Their Sign Patterns and Controllability”, International Journal of Control, Volume 4, 1966.

9. A. K. Mandal, D Roy Choudhury B. Roy and A. K. Choudhury “ On the evaluation of eAT “ Proc. IEEE, June 1968, pp. 1110-1111.

10. B. Roy, A. K. Mandal, D Roy Choudhury and A.K Choudhury, “On the evaluation of state Transition Matrix “ Proc. IEEE, vol. 57, pp. 234-235, Feb 1969.

11. A. K. Mandal, D Roy Choudhury, A. K. Bhattacharyya and A. K. Choudhury, “Response of linear Systems” Indian Journal of Pure and Applied Physics, Vol. 7, No. 2, pp. 122- 124,1969.

12. A.K. Mandal, D Roy Choudhury, A. K. Choudhury and A. K. Bhattacharyya, , “ A Numerical Computation method for the evaluation of Transition Matrix” Proc. IEE, Vol. 116, No. 4, pp. 500-502, April 1969.

13. N. G. Nath and A. K. Choudhury, “ Posicast and negicast control systems ”, International Journal of Control, Volume 9, 1969.

14. B. C. Roy and A. K. Choudhury, “On the determination of the inverse of a Vandermonde matrix”, International Journal of Control, Volume 12, 1970.

15. A. K. Mandal, D Roy Choudhury, A .K. Bhattacharya and A.K Choudhury, “ D.C. gain of the Non-linear element and the Describing Function”, Int. J. of Control, Vol. 12, No. 2, pp. 329-336, 1970.

16. D. Roy Choudhury, A. K. Mandal, , A. K. Bhattacharyya and A. K. Choudhury, “Powers of Companion Matrix and its Application” Proc. IEE-IERE, India, Vol. 8, No. 2, pp. 65-67, April –June 1970.

17. A. K. Mandal, D Roy Choudhury, A. K. Bhattacharya, A. K. Choudhury, “Application of Companion Matrix in the analysis of Control Systems”, Proc. All India Convention in Instrumentation and Automation, Ranchi, Nov, India, 1970.

18. A. K. Majumdar and A. K. Choudhury, "On the Decoupling  of  Non-linear Systems",  International  Journal  of Control (U.K.), Vol. 16, No. 4, pp 705-718, 1972. 

19. N. G. Nath, B. C. Roy and A. K. Choudhury, “Transient performance characteristics of control systems”, International Journal of Control, Volume 16, 1972.

20. T. K. Mukherjee, B. Bhattacharyya and A. K. Choudhury, “Transient stability of a power system by the second method of Lyapunov”, International Journal of Systems Science, Volume 3, 1972.

21. A. K. Majumdar and A. K. Choudhury, "On the  Decoupling of Linear Multivariable Systems", International Journal of Control (U.K.), Vol. 17, No. 2, pp 225-256, 1973. 

22. R. Ganguly, A. K. Mandal and A. K. Choudhury, “ Stability of Damped Mathieu equation “ Proc. IEE- IERE, India, Nov-Dec 1973, Vol. 10, No. 6, pp. 210-212.

23. A. K. Mandal, A. K. Choudhury, “ Inverse Optimization of a Class of Nonlinear Time varying Systems” Proc. National System Conf. IISc, Bangalore, India, June 4-6, 1973.

24. B. C. Roy and A. K. Choudhury, “Optimal control of a class of linear multivariable systems with integral quadratic energy constraint”, International Journal of Control, Volume 17, 1973.

25. T. K. Mukherjee, B. Bhattacharya and A. K. Choudhury, “ Transient stability of a double-excited synchronous machine by the second method of Lyapunov”, International Journal of Systems Science, Volume 4, 1973.

26. A. K. Mandal, A. K. Choudhury and D. Roy Choudhury “ Construction of Lyapunov function starting from a Initiating function”, Proc. IEE- IERE, India, Vol. 12, No. 1, pp. 3- 14, Jan-Feb 1974.

Publications of Prof. Choudhury on Graph Theory, Computer Architecture and Program Verification

1. S. R. Das, A. K. Choudhury, H. Debnath, and D. Sarma, “On the MMSC subgraphs of symmetric graphs,” Proc. 7 th Hawaii internat. Conf. Syst. Sci., Univ. Hawaii 1974, pp. 121-123.

2. A. Sen, M. K. Chakravarty, P. K. Srimani, B. P. Sinha and A. K. Choudhury, "A microprogrammed approach to FFT processing", Proceedings of Second All India Symposium on Computer Architecture and System Design, New Delhi, India, November 1976, pp. 43-55.

3. B. P. Sinha, P. K. Srimani and A. K. Choudhury, "A memory organization scheme for dedicated FFT processors", Proceedings of Computer Systems Organization and Programming, Calcutta, India, February 1976, pp. 120-129.

4. P. K. Srimani, B. P. Sinha and A. K. Choudhury, "An efficient scheme to generate all the cliques of a symmetric graph", Proceedings of Nineteenth Midwest Symposium on Circuits and Systems, Wisconsin, USA, August 1976, pp. 308-312.

5. B. P. Sinha, P. K. Srimani and A. K. Choudhury, "A new algorithm for the generation of all maximal compatible classes", Journal of Computer Society of India, Vol. 7, December 1976, pp. 10-13.

6. P. K. Srimani, B. P. Sinha and A. K. Choudhury, "Optimal job scheduling in multiprocessor systems", Proceedings of National Systems Conference, India, June 1977, pp. 11.1 - 11.5.

7. B. P. Sinha, P. K. Srimani and A. K. Choudhury, "Minimal test point location in a system graph", Proceedings of Twentieth Midwest Symposium on Circuits and Systems, Texas, 1977, pp. 567-570.

8. P. K. Srimani, B. P. Sinha and A. K. Choudhury, "A new method to find out the chromatic partition of a symmetric graph", International Journal of Systems Science, Vol. 9, December 1978, pp. 1425-1437.

9. P. K. Srimani, B. P. Sinha and A. K. Choudhury, "A new algorithm to determine all the minimum edge sets of a system graph", Journal of IETE, Vol. 24, December 1978, pp. 434-439.

10. P. K. Srimani, B. P. Sinha and A. K. Choudhury, "1-Distinguishability of SEC graphs", Proceedings of the IEEE, Vol. 66, December 1978, pp. 1668-1669.

11. B. P. Sinha, P. K. Srimani and A. K. Choudhury, "Some studies on verification of programs", Proceedings of Computer Society of India Convention '79, Bangalore, India, Jan. 1979.