Conferences

[3] Si Won Lee, Seongjae Cho, Il Hwan Cho, and Garam Kim, "1T DRAM with a Protruded SiGe Quantum Well for Larger Sensing Margin."The 29th Korean Conference on Semiconductors (KCS), p. 1035, Gangwon-do, Korea, Jan. 24-26, 2022

[2] Jin So, Seongjae Cho, Il Hwan Cho, and Garam Kim, "Design of 1T DRAM Device with a Hole Storage Region and Analysis on Its Sensing Margin," 2021 IEIE Summer Conference, pp. 405-406, Jeju, Korea, Jun. 30 - Jul. 2, 2021

[1] Won-Hyeong Joo, Seongjae Cho, Il Hwan Cho, and Garam Kim, "Analysis on Improvement in Performance of 1T DRAM Device with a Partial SiGe Layer in the Floating Body,"2021 IEIE Summer Conference, pp. 403-434, Jeju, Korea, Jun. 30 - Jul. 2, 2021