EECS 427

VLSI Design 1

This course introduces mask-level integrated circuit design and industry-standard APR techniques.

Topics covered in lectures include: CMOS processes, mask layout methods and design rules; circuit characterization and performance estimation; design for testability; and CMOS subsystem and system design.

Projects

There are 8 CAD assignments that build up the various components of our final project:

Register File (16-word by 16-bit)
ALU
Logarithmic Shifter (16-bit)
Program Counter
Pipelined Datapath
Controller

Using the VLSI Hierarchal Design Flow, DRC/LVS checks, NCVerilog/HSpice/Monte-Carlo verification, and industry-standard CAD tools for synthesis and APR (automatic place & route), we created a 2-stage pipelined processor with a 64-word by 16-bit 8T SRAM addition for our final project.