Plug the VGA monitor into the VGA port on Nexys4 board as shown on the right. Then, plug the potentiometer to the A/D converter. It allows the user to control the bat position by delivering a varying voltage.
Create a new VHDL source module called "vga_sync". It is the same code the team used in Labs 3 and 4 to generate VGA sync and timing signals.
Create a new VHDL source module called "bat_n_ball". It is a modified version of the ball module the team used in Labs 3 and 4.
Create a new VHDL source module called "adc_if". It converts the serial data, which consists of 4 leading zeros, from both channels of the A/D converter into 12-bit parallel format.
Create a new VHDL source module called "pong".