Chip-GaN Power Semiconductor

In the summer of 2022, I interned at the Chip-GaN Power Semiconductor Corporation, an IC design house located in Hsinchu, Taiwan, the global hub of semiconductor design/fabrication. Through this experience, I learned more about the IC design/layout process, the tools used in the industry for IC designers, and most importantly, the importance of transistors in powering the world's electronics.

Digital/Analog Simulation

Through tools like Hspice and Cadence, I conducted transient, DC, and AC simulation and analyses of MOSFETs, logic cells, and simple devices such as D flip-flop and T flip-flop. Through simulation, I was able to learn the importance of delays, the intrinsic structure of MOSFETS, and the functions of the CLK (clock) port.

IC Design Circuit Sample & Design

With the knowledge of basic circuit cells, I attempted to construct more complex circuits such as DFF, TFF counters, serial-in-parallel-out structures, level shifters, single-stage amplifiers, and more. In this phase, I was exposed to hands-on experience of using industry-level applications (i.e., Cadence) to design IC circuits.

ISSCC 2023 Participation

On February 21, 2023, I attended the International Solid-State Circuit Conference in San Francisco, California as an intern at Chip-GaN Power Semiconductor Corp. Mentored by two authors of the work, Chip-GaN lead IC designer Cheng Kuo-Lin and Prof. Chen Ke-Hrong of National Yang Ming Chiao Tung University, Taiwan, I was responsible to provide an introduction to the company's brand-new GaN chip during the demonstration session.

Through the experience of attending this conference and presenting the company's work, I learned about the processes involved in industry-level analog chip design in power semiconductor contexts.