Research
Bifluxon: Fluxon-Parity-Protected Superconducting Qubit
Granular Aluminum Meandered Superinductors for Quantum Circuits
Microresonators fabricated from high-kinetic-inductance Aluminum films
Cooper pair transport in 1D Josephson chains in the regime EC ≪ EJ ≈ T.
Verification of thermal activated phase slip picture for junctions in the regime EJ ≈ T, while EC ≪ EJ.
Observe power-law dependency of ISW/IAB v.s. EJ.
Process and signal integration for 3DIC stacking
Delivered an R&D process line for through transistor stacking with CoWoS structure, providing shorter circuit routing for high performance and throughput.
Achieved high capacitance-voltage uniformity and reliability for the TSVs, which is a key element for signal integration in 3DIC industry.
Left: Geometries for different technology nodes utilizing through silicon vias (TSV) technology.
Right/Top: Resistance comparison for TSVs and conventional interconnecting vias.
Right/Bottom: Capacitance-Voltage performance for the TSVs. The non-uniformity is around 5% distributed throughout a 12 inches wafer.
Left: A brief introduction for 3DIC process loop. (Before product packaging.)
Right: Several wafer level stacking chips ready for packaging.
Thermoelectric power in dual-gated bilayer graphene devices
Prepared dual-gate BLG devices with exfoliated boron-nitride crystal serving as top-gate dielectrics.
Demonstrated a four-fold enhanced TEP (48μV/K) under a strong electric field bias (0.7V/nm) along the out of sample plane direction at low temperature (15K).
Left: A dual-gated bilayer graphene device with exfoliated boron-nitride crystal serving as top-gate dielectrics. The shaded are marks out the top-gate effective region.
Right/Top: An illustration of the application of the displacement field D on an BLG device. Diagram on the right hand side shows the band gap opening due to the application of D.
Right/Bottom: A contour plot for the resistance (log-scale) as a function of bottom- and top-gate voltage applied and at temperature 200K .
Thermoelectric transport of bilayer graphene in the quantum Hall regime
Extracted the transverse thermal conductivity coefficient αxy with electrical and thermal electrical transport measurements at quantum Hall regime.
Found that the temperature dependence of the peak value, αxy;peak, is dictated by the disorder width WL and could be explained by Landau level broadening.
Left: The (a) thermal conductivity (b) lateral and transverse electrical conductivity (c) transverse thermal conductivity as a function of bottom gate voltage at a field 15Tesla and temperature 15K for a bilayer graphene.
Right/Top: An optical image for a bilayer graphene with substrate serving as a bottom gate.
Right/Bottom: The peak value αxy;peak as a function of the temperature. The linear dependence at low temperature kBT<<WL indicates the the number of disorder induced extended states increases with T. But when kBT increases to a level comparable with WL, the temperature increment no longer include more extended states and αxy;peak hence saturates to an universal value.
Electrical properties of the two dimensional electron gases
Characterized the Hall carrier concentration with the electromagnet cryostat.
Measured and found the carrier concentration in an RF-sputtered MgO/MgZnO heterostructure is about 1014 cm-2 despites of the intrinsic insulation of MgO film samples.
The sheet carrier concentration and mobility as a function of temperature of an Mg0.3Zn0.7O/ZnO thin film sample. The order of magnitude on the carrier concentration shows nearly no variation while temperature varied.
Stencil lithography patterning technique for graphene-base lateral spin valve system
Developed a photo-resist free electrode patterning technique by stencil masks (feature size up to 50:1) to ensure the contact quality in sample preparation.
Improved the contact resistance for graphene-based LSV samples, and demonstrated the consistent switching between parallel and anti-parallel states in non-local geometry.
(Image from the nanospin lab website)
A stencil mask fabricated by Focus Ion Beam system on a thin silicon nitride membrane.
The membrane is suspended on a silicon chip, and the smallest trench width is around 500nm. When depositing films, this mask is attached to the sample surface as close as possible.
Setup of an electromagnet cryostat for low temperature transport measurements
Setup a electromagnet equipped with close cycle liquid helium cryostats and vacuum chamber.
Customized a sample holder and a connection box with AutoCAD® design and machinery, and realized signal wiring and instrument automation through GPIB and LabVIEW® interface.
Calibrated a winding heater with local temperature sensors, and also calibrate the electromagnet with Gauss meters and Gauss probes.
(Image from the nanospin lab website)
The electromagnet cryostat for low temperature transport measurement, which is capable of cool down to temperature T around 5K with magnetic field up to ~1Tesla and 360 degree rotation.