VLSI-SDA Lab 연구팀이 2026년 한국반도체산업협회 제 33회 한국 반도체학술대회에 참가했습니다.
Poster Presentations
Dahun Ko, et al., "Learning Based Co-Optimization of Architecture and Transistor-Level Design for Power-Efficient Adder Tree in SRAM-Based In-Memory Computing"
Sejun Park, et al., "Energy-Efficient SRAM In-Memory Computing Circuit Enabled by Machine Learning-Based Design Optimization"