Unit – I
1. Draw flowchart of Booth’s algorithm for signed multiplication and multiply the following signed 2’s complement numbers. Justify your answer.
Multiplicand = 110011, Multiplier = 101100
2. Draw the hardware implementation of Booth’s algorithm and explain the same.
3. Draw the flow chart for floating point addition and explain.
4. Represent the following numbers in single precision floating point format:
a. 101.25
b. 41.625
5. Compare IEEE standard single precision and double precision floating point formats. Represent –(84.25)10 in single precision and double precision IEEE format.
6. Draw IEEE standard single precision and double precision floating point formats and state various fields in it with their size and significance.
7. Write Booth’s algorithm for restoring unsigned division and divide the following unsigned numbers and justify your answer.
Dividend = 1000, Divisor = 11
8. Explain IAS (Von Neumann) architecture with the help of a neat diagram.
9. What is the use of guard bit? List the alternative methods of rounding the results of floating-point operations.
Unit-II
1. State design factors in design of instruction format. Draw instruction format for Intel processors and explain various fields in it.
2. Draw and explain architecture of 8086.
3. Draw and explain programmer’s model of 8086.
4. Draw and explain architecture of Intel processor.
5. Explain following addressing modes of 8086:
a. Index addressing
b. Register indirect
c. Base index with displacement addressing
d. Auto increment
6. Draw timing diagram for memory read cycle of 8086 and list operations in each T state.
7. Draw timing diagram for memory write cycle of 8086 and list operations in each T state.
8. Write a note on MIN/MAX mode of 8086.
9. State and explain any 4 addressing modes with examples for Intel processors.
Unit-III
1. Explain design of multiplier control unit using any hardwired control unit.
2. Draw and explain the micro-programmed control unit.
3. What are the different design methods for Hardwired control units? Explain any one.
4. Write control sequence for an unconditional branch instruction.
5. With the help of circuit diagram, explain how Zin and end signals are generated?
6. Write control sequence for execution of the instruction:
Add (R3), R1
7. Draw neat diagram of single bus organization of CPU showing ALU, all types of registers and the data paths among them. Compare it with multiple bus organization of CPU.
8. Draw and explain single bus organization of the CPU, showing all the registers and data paths.
9. Compare:
a. Hardwired and Micro-programmed control
b. Horizontal and vertical micro-instruction format
Unit-IV
1. What is virtual memory? Explain address translation mechanism for converting virtual address into physical address with neat diagram.
2. What is cache coherence and discuss MESI protocol
3. Explain direct mapping technique with example.
4. A direct mapped cache has the following parameters:
Cache size = 1K words, block size = 128 words and main memory size is 64K words. Specify the number of bits in TAG. BLOCK and WORD in main memory address.
5. A block set-associative cache consists of 64 blocks divided into 4 block sets. The main memory contains 4096 blocks, each consisting of 128 words of 16-bit length:
a. How many bits and there in main memory?
b. How many bits are there in each of the TAG, SET and word fields?
6. State cache mapping techniques. Draw and discuss them with merits and demerits.
7. Explain the role of TLB in virtual memory organization?
8. State and explain different page replacement algorithm.
9. Write short notes on
a. EEPROM
b. Magnetic Disk
c. Optical Disk
d. RAID
e. SDRAM
f. DVD
Unit- V
1. Explain the following:
a. Scanner
b. Keyboard
2. What is programmed IO and interrupt driven IO? Compare them.
3. Explain technique for performing IO.
4. What is DMA? Explain DMA operation with a diagram. Also explain data transfer modes in DMA.
5. Explain the function and features of IC 8255 and 8251.
6. Explain PCI bus with diagram.
7. What is an operating system? Explain in detail.
8. Write a short notes on-
a. Touch screen panel.
b. Memory management
Unit-VI
1. Draw and explain loosely coupled multiprocessor configuration with its merits.
2. Compare closely coupled and loosely coupled multiprocessor configurations. Explain loosely coupled multiprocessor configuration.
3. Explain function level pipelining with neat diagram.
4. Explain briefly:
a. Instruction pipelining
b. Superscalar architecture
5. What is cluster? State the advantages of clustering. Explain cluster classification.
6. Explain symmetric multiprocessor organization.
7. Write a short note on vector computation.
8. Write a note on Power PC.
9. Write short notes on-
a. NUMA
b. UMA
c. RISC
d. CISC
e. Cluster
f. Super Scalar Architecture
10. Compare:
a. UMA and NUMA
b. RISC and CISC
Contact: Mr. Tushar B Kute (tbkute@gmail.com)