A. Whitcombe, S. Kundu, H. Chandrakumar, A. Agrawal, T. Brown, S. Callender, B. Carlton, S. Pellerano, "A 7b 76mW 40GS/s Hybrid Voltage/Time-Domain ADC With Common-Mode Input Tracking", IEEE Solid-State Circuits Letters (LSSC), Jul. 2024 [Invited]
A. Agrawal, A. Whitcombe, W. Shin, R. Bhat, S. Kundu, P. Sagazio, H. Chandrakumar, T. Brown, B. Carlton, C. Hull, S. Callender, S. Pellerano, "A 128-Gb/s -Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET", IEEE Journal of Solid-State Circuits (JSSC) Oct. 2023 [Invited]
A. Whitcombe, C. Lee, A. K. Thekkumpate, S. Kundu, J. Timbadiya, A. Agrawal, B. Carlton, P. Sagazio, S. Pellerano, C. Hull, "A VTC/TDC-Assisted 4x Interleaved 3.8 GS/s 7b 6.0 mW SAR ADC with 13 GHz ERBW", IEEE Journal of Solid-State Circuits (JSSC) Jan. 2023 [Invited]
H. Luo, S. Kundu, T. Huusari, S. Shahraini, E. Alban, J. Mix, N. Kurd, M. Abdel-Moneum and B. Carlton "A Fast Startup Crystal Oscillator Using Impedance Guided Chirp Injection in 22 nm FinFET CMOS", IEEE Journal of Solid-State Circuits (JSSC) Dec. 2021 [Invited]
S. Kundu, L. Chai, K. Chandrashekar, S. Pellerano and B. Carlton, "A Self-Calibrated 2-bit Time-Period Comparator based Synthesized Fractional-N MDLL in 22nm FinFET CMOS " IEEE Journal of Solid-State Circuits (JSSC) Jan. 2021 [Invited] (Among 50 most downloaded article in Jan'21 for JSSC)
S. Kundu, M. Liu, S. Wen, R. Wong, and C.H. Kim, "A Fully Integrated Digital LDO with Built-in Adaptive Sampling and Active Voltage Positioning Using a Beat-Frequency Quantizer " IEEE Journal of Solid-State Circuits (JSSC), vol 54, issue 1, Jan. 2019 [Invited] (Among 50 most downloaded article in Oct'18 and Jan'19 for JSSC)
P. Chiu, S. Kundu, Q. Tang, C. H. Kim, “A 65nm 10 Gb/s 10mm On-Chip Serial Link Featuring a Digital-Intensive Time-Based Decision Feedback Equalizer” IEEE Journal of Solid-State Circuits (JSSC), vol 53, issue 4, Apr. 2018 [Invited]
S. Kundu, B. Kim, C. H. Kim, “A 0.2-1.45-GHz Sub-sampling Fractional-N Digital MDLL With Zero-offset Aperture PD Based Spur Cancellation and In-situ Static Phase Offset Detection,” IEEE Journal of Solid-State Circuits (JSSC), vol 52, issue 3, Mar. 2017 (Among 50 most downloaded article in Mar'18 for JSSC)
S. Kundu, C. H. Kim, “A 0.0054mm2 Frequency-to-Current Conversion Based Fractional Frequency Synthesizer in 32nm Utilizing Deep Trench Capacitor," IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 63, issue 5, May 2016
A. Whitcombe, S. Kundu, H. Chandrakumar, A. Agrawal, T. Brown, S. Callender, B. Carlton, S. Pellerano, "A 76mW 40GS/s 7b Time-Interleaved Hybrid Voltage/Time-Domain ADC with Common-Mode Input Tracking", IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2024
A. Agrawal, A. Whitcombe, W. Shin, R. Bhat, S. Kundu, P. Sagazio, H. Chandrakumar, T. Brown, B. Carlton, C. Hull, S. Callender, S. Pellerano, "A 128Gb/s 1.95 pJ/b D-Band Receiver with Integrated PLL and ADC in 22nm FinFET", IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2023
A. Whitcombe, C. Lee, A. K. Thekkumpate, S. Kundu, J. Timbadiya, A. Agrawal, B. Carlton, P. Sagazio, S. Pellerano, C. Hull, “A 6.0mW 3.8GS/s 7b VTC/TDC-Assisted Interleaved SAR ADC with 13GHz ERBW,” IEEE Symposium on VLSI Circuits (VLSIC), Honolulu, HI, Jun. 2022
S. Kundu, T. Huusari, H. Luo, A. Agrawal, E. Alban, S. Shahraini, T. Xiong, D. Lake, S. Pellerano, J. Mix, N. Kurd, M. Abdel-moneum, B. Carlton, "A 2-to-2.48GHz Voltage-Interpolator-Based Fractional-N Type-I Sampling PLL in 22nm FinFET Assisting Fast Crystal Startup," IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2022
H. Luo, S. Kundu, C. Lee, R. Jain, S. Shahraini, E. Alban, T. Huusari, J. Mix, N. Kurd, M. Abdel-moneum, B. Carlton, “A 12MHz/38.4MHz Fast Start-Up Crystal Oscillator using Impedance Guided Chirp Injection in 22nm FinFET CMOS,” IEEE Custom Integrated Circuits Conference (CICC), Apr. 2021 [Invited to JSSC]
S. Shahraini, H. Luo, T. Huusari, E. Alban, S. Kundu, R. Jain, J. Mix, B. Carlton, R. Abdolvand, M. Abdel-moneum and N. Kurd, "Resilient Ultra Stable CMOS-MEMS Oscillator with Receiver in Intel 22FFL Technology" IEEE International Conference on Micro Electro Mechanical Systems (MEMS), Jan. 2021
S. Kundu, L. Chai, K. Chandrashekar, S. Pellerano and B. Carlton, "A Self-Calibrated 1.2-to-3.8GHz 0.0052mm2 Synthesized Fractional-N MDLL Using a 2-bit Time-Period Comparator in 22nm FinFET CMOS" IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2020 [Invited to JSSC]
S. Pellerano, S. Callender , W. Shin, Y. Wang, S. Kundu, A. Agrawal, P. Sagazio, B. Carlton, F. Sheikh, A. Amadjikpe, W. Lambert, D. S. Vemparala, M. Chakravorti, S. Suzuki, R. Flory, C. Hull, "A Scalable 71-to-76GHz 64-Element Phased-Array Transceiver Module with 2×2 Direct-Conversion IC in 22nm FinFET CMOS Technology" IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2019
L. Everson, S. Kundu, G. Chen, Z. Yang, T. Ebner, C.H. Kim, “A 0.0094mm2/Channel Time-Based Beat Frequency ADC in 65nm CMOS for Intra-Electrode Neural Recording”, IEEE Biomedical Circuits and Systems Conference (BioCAS), Oct. 2018
S. Kundu, M. Liu, S. Wen, R. Wong, C.H. Kim, “A Fully Integrated 40pF Output Capacitor Beat-frequency Quantizer based Digital LDO with Built-in Adaptive Sampling and Active Voltage Positioning”, IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2018 [Invited to JSSC]
P. Chiu, S. Kundu, Q. Tang, C.H. Kim, “A 10Gb/s 10mm On-Chip Serial Link in 65nm CMOS Featuring a Half-Rate Time-Based Decision Feedback Equalizer”, IEEE Symposium on VLSI Circuits (VLSIC), Kyoto, Japan, June 2017 [Invited to JSSC]
S. Kundu, C.H. Kim, “A Multi-Phase VCO Quantizer Based Adaptive Digital LDO in 65nm CMOS Technology”, IEEE International Symposium on Circuits and Systems (ISCAS), Baltimore, MD, May 2017
S. Kundu, B. Kim, C. H. Kim, “A 0.2-to-1.45GHz Sub-sampling Fractional-N All-Digital MDLL with Zero-offset Aperture PD based Spur Cancellation and In-situ Timing Mismatch Detection," IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2016
S. Kundu, B. Kim, C. H. Kim, “Two-step Beat Frequency Quantizer Based ADC with Adaptive Reference Control for Low Swing Bio-potential Signals,” IEEE Custom Integrated Circuits Conference (CICC), San Jose, CA, Sep. 2015
S. Kundu, V. Kireev, C. H. Kim, "A 8-14GHz Varactorless Current Controlled LC Oscillator in 16nm CMOS Technology," IEEE Midwest Symposium on Circuits and Systems (MWSCAS), Fort Collins, CO, Aug. 2015
B. Kim, S. Kundu, C. H. Kim, "A 0.4-1.6GHz Spur-Free Bang-Bang Digital PLL in 65nm with a D-Flip-Flop Based Frequency Subtractor Circuit," IEEE Symposium on VLSI Circuits (VLSIC), Kyoto, Japan, Jun. 2015
B. Kim, S. Kundu, S. Ko, C. H. Kim, “A VCO-based ADC with a Multi-Phase Noise-Shaping Beat Frequency Quantizer Achieving 43dB SNDR for 1mV Input Signal,” IEEE Custom Integrated Circuits Conference (CICC), San Jose, CA, Sep. 2014
S. Kundu, S. Chatterjee, "A 44GHz Quadrature traveling wave oscillator", IEEE International Conference on VLSI Design (VLSID), Pune, India, Jan. 2013 (Best Student Paper Award)
N. Gupta, T. Nandy, S. Kundu, "HDMI Transmitter in 32nm Technology using 28Å MOS," IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, S. Korea, May 2012
S. Kundu, J. Im, H. Zhang, Y. Chen, A. Jain, "Deterministic Jitter Detection and Correction in a Divide-by-1.5 Frequency Divider" United States, US18/951394, Nov. 2024 (AMD)
H. Luo, S. Kundu, B.Carlton "Sampling fractional-N phase-locked loop with feedback spur compensation" United States US17/970,477, Apr. 2024 (Intel Corporation)
S Kundu, A Whitcombe, S Pellaerano, P. Sagazio, B Carlton "Analog-to-digital converter, receiver, base station, mobile device and method for a time-interleaved analog-to-digital converter" United States, U17/933,512, Mar. 2024 (Intel Corporation)
T. Huusari, M.A Abdelmoneum, B.R Carlton, S. Kundu, H. Luo, S. Shahraini, J. Mix, E. Alban "Mode Select for Multi Frequency Resonator" United States, U17/854,534, Jan. 2024 (Intel Corporation)
A Whitcombe, S Kundu, BR Carlton " Low Noise Inverter based Voltage-to-Time Converter with Common-mode Input Tracking" United States, 17/561,457, Jun. 2023 (Intel Corporation)
S Kundu, A Whitcombe, S Pellaerano, BR Carlton "High-Speed Digital-to-Analog Converter Calibration" United States, 17/558,056, Jun. 2023 (Intel Corporation)
S.Kundu, S.Pellerano, B R. Carlton "Calibration for dtc fractional frequency synthesis" United States, 17/481,827, Mar. 2023 (Intel Corporation)
S. Kundu, H. Luo, B.Carlton "Phase locked loop assisted fast start-up apparatus and method" United States, 17/338,497, Dec. 2022 (Intel Corporation)
H. Luo, S. Kundu, B. Carlton, Z. Zhou "Technologies for Radio Frequency Touch and Gesture Recognition," United States, 17/711,905 , Jul. 2022 (Intel Corporation)
S. Kundu, A. Agrawal, B. Carlton "Reference sampling Type-I fractional-N phase locked loop" United States, 17/024,419, Mar. 2022 (Intel Corporation)
H. Luo, B. Carlton, S. Kundu "Fast Start-up Crystal Oscillator" United States, 16/833,298, Sep. 2021 (Intel Corporation)
A Agrawal, A. Cohen, G. Horovitz, S. Kundu, R. Levinger, S. Pellerano, J. Sharma, E. Shumaker, I. Hod "Quadrature Local Oscillator Signal Generation Systems and Methods" United States, 16/352,043, Sep. 2020 (Intel Corporation)
S. Kundu, S. Pellerano, A. Agrawal "Sub Sampling Phase Locked Loop (SSPLL) with Wide Frequency Acquisition", United States, 16/126,722, March 2020 (Intel Corporation)
P. Chiu, S. Kundu and C. H. Kim, "Time-based Decision Feedback Equalization", United States, 15/806,901, December 2018 (University of Minnesota)
S. Kundu, V. Kireev, "LC Oscillator Circuit with Wide Tuning Range" , United States, US979663, June 2016 (Xilinx Inc.)
S. Kundu, P. Sarkar, N. Gupta "High Voltage Tolerance of External Pad Connected MOS in Power-off Mode", United States, US8183911 B2, May 2012 (STMicroelectronics)