I. General Information
Full Name: Thi Hong TRAN
Full time lecturer, Graduate School of Information, Osaka Metropolitan University (OMU), Japan
Visiting Associate Professor, Nara Institute of Science and Technology (NAIST), Japan
Contact Information:
email: hong@omu.ac.jp (x21799a@omu.ac.jp)
Degree:
Bachelor (2008, HCM Univesity of Science, Vietnam)
Master (2012, HCM University of Science, Vietnam) + Kyushu Institute of Technology, Japan.
Doctor (Ph.D.) (2014, Kyushu Institute of Technology, Japan)
Other Website:
Member ID:
E-Rad: 90760835
IEEE:
II. Research Interest
Blockchain applications and hardware accelerator
High security smart system using AI+IoT+BC
Hardware circuit design and algorithm that relate to:
Wireless communication: WI-FI (802.11a/n/ac), WBAN
Healthcare system, Internet of Things (IoT)
Digital signal processing
Global navigation satellite system (GNSS)
III. Education
2012/10 - 2014/12 : PhD student at Kyushu Institute of Technology (Kyutech), Japan. Dissertation title: "A Study on High Performance Gbps MIMO Wireless System" This research focuses on WEP security, MIMO Decoder, and LDPC Decoder (both algorithm and hardware design).
2010/10 - 2012/5: Master student at HCMUS, Vietnam (with one year research at Ochi lab, Kyushu Institute of Technology, Japan). Thesis title: "Research and Design the PHY Layer of MIMO 802.11n system that achieves up to 600 Mbps throughput"
2004/9 - 2008/7: Undergraduate student at Ho Chi Minh University of Science (HCMUS), Vietnam National University. Thesis title: "Design an optical character’s recognition system on FPGA using Artificial Neuron Networks (ANNs) theory"
IV. Work
From 2022/4 - ...: Full time lecturer, Graduate School of Information, Osaka Metropolitan University (OMU), Japan
2021/10 - 2022/3: Full time lecturer, Graduate School of Engineering, Osaka City University (OCU), Japan. Visiting Associate Professor, NAIST, Japan.
2015/1 - 2021/9 (7 years): Assistant Professor, Computing Architecture Lab, Information Science Division, Nara Institute of Science and Technology (NAIST), Japan.
2009/5 - 2010/9 (1.5 years): Researcher, at Vietnam National University Integrated Circuit Design Research and Education Center (ICDREC), belongs to Specification-1 group (which research about microprocessor and peripherals).
2008/8 - 2009/4 (<1 year): Design Engineer, at Altera Vietnam R&D center, belongs to Digital Signal Processing group.
IV. Award
2018/10: Best Paper Award, paper: "Demonstrate of A VLC Using Rolling Shutter Smartphone Camera", ATC-2018, Ho Chi Minh, Vietnam
2017/12: Outstanding Research Achievement Award, research: "Challenges on Developing Low Cost Low Power IoT Sensor Transceiver Based on IEEE 802.11ah", IC-TECS 2017, Taiwan
2017/12: Best Poster Award, paper "A Precise Indoor Localization System with Fixed Visible Light Communication LEDs for Smart Shopping", IC-TECS 2017, Taiwan
2012/2: Outstanding Paper Award, paper: "ASIC Implement of 600Mbps IEEE 802.11n 4x4 MIMO Wireless LAN System", ICACT-2012 conference, Korea.
2010/3: 1st prize of LSI Design Contest, research "Design a low cost BCH Decoder", IEICE and LSI Design Contest 2010, Japan.
2007 - 2008: 1st prize of "HCMUS student science research", HCMUS and 2nd prize of "EUREKA contest" by Ho Chi Minh city, Vietnam. Research "Design an optical character’s recognition system on FPGA using Artificial Neuron Networks (ANNs) theory"
IV. Publication
V.1. 特許/Patent
[1] Tran Thi Hong, “A New Simple Division Circuit for Two Numbers in Binary Galois Field, ” Vietnam patent, number 1-2010-00844, April 2010. (2010)
V.2. 論文/Transaction - Journal - conference papers
Please visit my google scholar page for the list of papers.