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I. General Information

Full Name: Thi Hong TRAN, Assistant Professor (Ph.D.)

Contact Information:

Mail: hong@is.naist.jp

phone: +81 743 72 5302

Fax: +81 743 72 5309

Degree:

Bachelor (2008, HCM Univesity of Science, Vietnam)

Master (2012, HCM University of Science, Vietnam) + Kyushu Institute of Technology, Japan.

Doctor (Ph.D.) (2014, Kyushu Institute of Technology, Japan)

Other Website:

https://www.researchgate.net/profile/Thi_Hong_Tran


II. Research Interest

Focus on both hardware circuit design and algorithm that relate to:

- Wireless communication: WI-FI (802.11a/n/ac), WBAN

- Healthcare system, Internet of Things (IoT)

- Digital signal processing

- Global navigation satellite system (GNSS)


II. Education

+ 2012/10 - 2014/12 : PhD student at Kyushu Institute of Technology (Kyutech), Japan. Dissertation title: "A Study on High Performance Gbps MIMO Wireless System" This research focuses on WEP security, MIMO Decoder, and LDPC Decoder (both algorithm and hardware design).

+ 2010/10 - 2012/5: Master student at HCMUS, Vietnam (with one year research at Ochi lab, Kyushu Institute of Technology, Japan). Thesis title: "Research and Design the PHY Layer of MIMO 802.11n system that achieves up to 600 Mbps throughput"

+ 2004/9 - 2008/7: Undergraduate student at Ho Chi Minh University of Science (HCMUS), Vietnam National University. Thesis title: "Design an optical character’s recognition system on FPGA using Artificial Neuron Networks (ANNs) theory"


III. Work

+ From 2015/1: Assistant Professor, at Nara Institute of Science and Technology (NAIST), Japan. Belongs to Computer Architecture lab.

+ 2009/5 - 2010/9: Researcher, at Vietnam National University Integrated Circuit Design Research and Education Center (ICDREC), belongs to Specification-1 group (which research about microprocessor and peripherals).

+ 2008/8 - 2009/4: Design Engineer, at Altera Vietnam R&D center, belongs to Digital Signal Processing group.


IV. Award

+ 2012/2: Outstanding Paper Award, paper: "ASIC Implement of 600Mbps IEEE 802.11n 4x4 MIMO Wireless LAN System", ICACT-2012 conference, Korea.

+ 2010/3: 1st prize of LSI Design Contest, research "Design a low cost BCH Decoder", IEICE and LSI Design Contest 2010, Japan.

+ 2007 - 2008: 1st prize of "HCMUS student science research", HCMUS and 2nd prize of "EUREKA contest" by Ho Chi Minh city, Vietnam. Research "Design an optical character’s recognition system on FPGA using Artificial Neuron Networks (ANNs) theory"


IV. Publication

V.1. 特許/Patent
[1]   Tran Thi Hong
, “A New Simple Division Circuit for Two Numbers in Binary Galois Field, ” Vietnam patent, number 1-2010-00844, April 2010. (2010)


V.2. 論文誌
/Transaction - Journal

[1]  Thi Hong Tran, Yuhei Nagao, and Hiroshi Ochi“Algorithm and Hardware Design of A 2D Sorter-based K-best MIMO Decoder,” EURASIP Journal on Wireless Communications and Networking.2014, 2014:93, DOI: 10.1186/1687-1499-2014-93, Jun. 2014.  (2014, Impact Factor = 0.8)

[2]  Thi Hong Tran, Leonardo Lanante JR., Yuhei Nagao, and Hiroshi Ochi, “Hardware Design of Multi Gbps RC4 Stream Cipher,” 2013 IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E96-A, No. 11, pp. 2120 – 2127, Nov. 2013.  (2013, Impact Factor = 0.24)

 V.3. 国際会議/International Conferences

[1]  Thi Hong Tran,  Yuhei Nagao, Hiroshi Ochi, and Masayuki Kurosaki, “ASIC Design of 7.7 Gbps Multi-mode LDPC Decoder for IEEE 802.11ac,” 14th International Symposium on Communications and Information Technologies (ISCIT-2014), Incheon, Korea, Sept. 2014, pp. 259-263  (2014)

[2]  Thi Hong Tran, Yuhei Nagao, and Hiroshi Ochi, “A 2D Sorter-based K-best Algorithm for High Order Modulation MIMO Systems,” 2014 IEEE 80th Vehicular Technology Conference: VTC2014-Fall, Vancouver, Canada, Sept. 2014, 5 pages (accepted).  (2014)

[3]  Thi Hong Tran, Yuhei Nagao, and Hiroshi Ochi, “A 4x4 Multiplier-Divider-Less K-Best MIMO Decoder Up to 2.7 Gbps, 2014 IEEE International Symposium on Circuits and Systems (ISCAS-2014), Melbourne, Australia, Jun. 2014, pp. 1696-1699. (2014)

[4]  Thi Hong Tran, Reina Hongyo, Yuhei Nagao, and Hiroshi Ochi, “Algorithm and Hardware Design of a Quasi MLD Decoder for MIMO Systems,” 2014 International Symposium on Dependable Integrated Systems (DISC), Fukuoka, Japan, March 2014.  (2014)

[5]  Thi Hong Tran, Yuhei Nagao, and Hiroshi Ochi, "A Novel Efficient MLD Algorithm Using I/Q Separating Method for MIMO System," IEEE International Conference on Advanced Technologies for Communications (ATC) 2013, Vietnam, pp. 506-510, Oct. 2013.  (2013)

[6]   Thi Hong Tran, Hiroshi Ochi, and Masayuki Kurosaki, “The Novel M-Byte RC4 Architecture for High Throughput WLAN Systems,” The 2013 International Symposium on Electrical-Electronics Engineering (ISEE-2013), Ho Chi Minh, Vietnam, Nov. 2013. (2013)

[7]   Thi Hong Tran, Leonardo Lanante JR., Yuhei Nagao, Masayuki Kurosaki, and Hiroshi Ochi, “Hardware Implementation of High Throughput RC4 Algorithm,” 2012 IEEE International Symposium on Circuits and Systems (ISCAS-2012), Seoul, Korea, May 2012, pp. 77 – 80.  (2012)

[8]  Thi Hong Tran, Yuhei Nagao, Masayuki Kurosaki, Hiroshi Ochi, and Baiko Sai, “Model-based Design Method for Wireless System VLSI with Synopsys  Synphony Tool,” The 2nd Solid-State Systems Symposium - VLSI & Related Technologies (4S), Vietnam, Aug. 2012, pp. 283-289. (2012)

[9]  Thi Hong TRAN, Yuhei Nagao, Masayuki Kurosaki, Baiko Sai, and Hiroshi Ochi, “ASIC Implement of 600Mbps IEEE 802.11n 4x4 MIMO Wireless LAN System,” The 14th IEEE International Conference on Advanced Communication Technology (ICACT-2012), Korea, Feb. 2012, pp. 360 – 363.  (2012)

[10]  Thi Hong TRAN, and Duc Hanh Luyen, "New Design for High Performance Serial and Parallel BCH(15,7,2) Decoder," The First Solid-State Systems Symposium - VLSI & Related Technologies (4S), Vietnam, June 2010, pp. 163 – 166. (2010)

 V.4. 国内会議/Domestic Conferences

[1]  Thi Hong Tran, Reina Hongyo, Yuhei Nagao, Hiroshi Ochi, "Low Complexity Quasi MLD MIMO Decoder Using 2D Sorter," IEICE Tech. Rep., vol. 113, no. 386, RCS2013-265, pp. 59-64, Jan. 2014. (2014)

[2]  本行礼奈,トランティホン,長尾勇平,黒崎正行,尾知博,"MIMOデコーダの低演算量MLDの設計に関する検討," IEICE総合大会,B-5-149pp.544,新潟大学,  March 2014  (2014)

[3]  Reina Hongyo, Thi Hong Tran, Hiroshi Ochi "An Efficient MIMO Maximum Likelihood Detection Algorithm using I/Q Separating Method," IEICE society conferenceB-5-103pp.466FukuokaSept. 2013.  (2013)

[4]  Leonaro Lanante Jr., Shogo FUJITA, Yuji YOKOTA, Takuro YOSHIDA, Thi Hong Tran, Yuhei NAGAO, Baiko SAI, and Hiroshi OCHI, “Design of 1.7 Gbps IEEE 802.11ac Multi-User MIMO Wireless LAN System,” WTP Wireless Technology Park 2012, Yokohama, Japan, Jul. 2012.  (2012)

[5]  Thi Hong Tran, Andjas Ardiansyah, Nico Surantha, Yuhei Nagao, Masayuki Kurosaki, and Hiroshi Ochi, “Design and ASIC Implementation of 600Mbps IEEE 802.11n 4x4 MIMO OFDM System,” IEICE Society Conference 2011, Hokkaido, Japan, Sept. 2011.  (2011)