Copyright 2010 Mark P D Burgess
In 1952, a year after the co-inventor of the point-contact transistor, John Bardeen, left Bell to take up a chair in Electrical Engineering and of Physics at the University of Illinois at Urbana-Champaign, he wrote in his laboratory notebook a vision for the silicon diffused transistor:
“One can form devices of a predictable structure by controlled diffusion. For example, one might start with a p-type block, change a thin layer near the surface to n-type by diffusion, and then make a thin p-layer next to the surface by diffusion of an acceptor:”
He also suggested that the two additional layers might be formed either sequentially or simultaneously by exploiting differential rates of diffusion of n-type and p-type impurities:
“By successive diffusion (or simultaneous diffusion if the rates are appropriate) of n and p-type impurities one could make a layered structure of the NPN or PNP varieties.” [cited by Holonyak 2003]
He noted that the concept for differential diffusion arose from the work of Dunlap and Brown at General Electric who had presented their work on diffusion coefficients of n-type and p-type impurities in germanium at “recent talks” and subsequently published. [Dunlap 1952, 1954]
Dunlap’s research was intended to support the General Electric alloy junction transistor developed by John Saby in which two indium dots were alloyed to either side of a small pellet of n-type germanium: on alloying the indium created p-type regions giving a PNP structure. It was not initially clear if p-n junctions were being formed by an indium-germanium alloying process or by diffusion of the indium into the n-type germanium pellet. When Hall and Dunlap published P-N Junctions by Impurity Diffusion [Hall 1950] they made it clear that they thought the mechanism was “thermal diffusion,” a view subsequently disputed and resolved by John Saby in 1953. [Burgess 2008]
Dunlap showed that in germanium donor or n-type impurities such as arsenic or antimony diffuse much more rapidly than acceptor or p-type impurities such as aluminium, gallium and indium. The work was performed by measuring diffusion from very thin layers of these elements alloyed to the surface of the germanium.
Bardeen’s conceptual breakthrough anticipated Bell’s later work on diffusion from the gas phase and that of Philips and Mullard which utilised differential diffusion of a mixture of two elements alloyed to the surface of a germanium pellet.
Bardeen may be the most famous of the Bell alumni to propose a diffused transistor but not the first. Calvin Fuller suggested that p-n junctions could be formed through diffusion in 1951.
Fuller was a polymer chemist seconded from Bell to support synthetic rubber research during World War II. After the War he returned to Bell but as a result of the reorganization of Bell’s materials research moved into semiconductors.
Fuller investigated impurity diffusion in semiconductors beginning with the “thermal conversion” problem in germanium in which an unknown contamination of n-type germanium changed it to p-type on heating at over 500oC. Fuller showed that the contaminant was copper which diffused rapidly throughout germanium converting it to p-type.
“This work on copper led to a search for other fast-diffusing agents and to an examination of diffusion in general. We went into the diffusion of the Group III and Group V elements and we published papers on them.”
In doing so he created a body of knowledge on the diffusion of other donor and acceptor elements.
Fuller recalls advocating the value of diffusion in a memo dated 7th March 1951: “When we were first developing the diffusion method (1950), I got the feeling that the Labs was not fully appreciative of the possibilities and were slow in backing our work. I wrote a letter up the line at the time to that effect, but it apparently didn't stir up matters. I suppose one has to consider the fact that many more important decisions had to be made at that time.” [Bohning 1986]
His early work was published in 1952 and pointed out that p-n barriers could be formed by diffusing donor elements into p-type germanium or acceptor elements into n-type germanium.
Fuller’s work was carried out diffusing arsenic or antimony into p-type germanium doped with gallium and indium into n-type germanium. He characterised the temperature dependence of the rate of diffusion by measuring the position of the p-n barrier using probes. In germanium he showed that donors such arsenic and antimony diffuse significantly faster than acceptors such as indium. In silicon this is reversed.
Continuing the work on diffusion in germanium, Calvin Fuller carried out detailed work on the diffusion of donors and acceptors into silicon using the pure elements as the source and carrying out diffusion experiments in evacuated silica tubes. He showed that in the case of silicon:
(a) The diffusion rate of acceptors was 10-100 times faster than donors for Group III and Group VI elements in the same row in the periodic table; and
(b) The steady state surface concentration of donors was 10-100 times higher than acceptors.
Thus by simultaneous diffusion of the right donors and acceptors into n-type silicon:
(a) A sub-surface p-type layer is formed due to the faster diffusion rate of acceptors; and
(b) An external n-type layer is formed on the silicon because of the greater accumulation of diffused donors on the surface. [Tanenbaum 1956]
The solar cell and power rectifiers from 1954 were the first applications of Fuller’s diffusion research in silicon.
The early stage solar cell development was led by Daryl Chapin. The programme started in 1952 in response to the need for sustainable sources of energy in remote locations to
Chapin knew that he needed large area junctions which were close to the surface in order to prevent the absorption of the incident light before it reached the junction [Perlin 2004] and that diffused junctions, which were a surface phenomenon, should provide a viable solution. Accordingly he collaborated with Gerald Pearson and then Calvin Fuller obtaining early success by treating gallium doped silicon with lithium. But lithium did not prove to be ideal due to its high diffusion rate even at low temperatures: its junctions were unstable and migrated away from the surface. Fuller’s work on diffusion rates of donors and acceptors in silicon provided a solution: “We had studied diffusion rates of most donors and acceptor elements and I immediately suggested we try phosphorus and boron which I knew formed permanent junctions for room temperature use. We tried these and found that very thin p-n junctions could be formed in silicon that probably would yield good photocells.” [Bohning 1986]
Methods of making contact to either side of the junction that minimised resistive losses were needed and this involved compromising ideal shallow junctions: “Penetration of radiation over most of the useful spectrum is extremely shallow so that it becomes necessary to place the p-n junction as near to the surface as possible except for ... the I2R [power] loss caused by resistance in the surface layer and by contact resistance... For cells of several square centimeters, special geometry of contacts will minimize resistance losses.” [Chapin 1954]
The second issue was how to make contact to the surface diffused layer without shorting the junction, a problem that arose in diffused transistors also.
James Early recalls: “Making electric contact to the very thin diffused layer posed new problems. The
Picture above courtesy Joe Knight showing a prototype cell similar to those shown in Bell Labs Record for July, 1955.
Gerald Pearson and Calvin Fuller worked on power rectifiers and lightning protectors made from large area
In the example shown acceptor impurities were diffused into one side of an n-type silicon wafer to form a rectifying junction. Donor impurities were diffused into the opposite side to improve the conductivity of the rectifier. Both sides were metallized and the rectifier was mounted between two electrodes.
Prototypes of this kind were developed early in 1954 and with areas of 0.75 cm2 could handle forward currents of 20 amps with forward voltages of under 2 volts and reverse voltages of 85 volts. [Pearson 1955]
Jack Morton took over the leadership of the team charged with developing the first commercial transistor soon after 1948. In 1952 he was appointed Assistant Director of electronic component development and in 1953 became Director of Transistor Development. He was made Executive Director in 1955 and later went on to more senior positions. [Sparks 1971]
There were four departments engaged in significant semiconductor research and development: device research, materials research, chemistry, and device development departments. John Moll recalls that Gordon Teal was responsible for crystal growth and that Teal went directly to Morton to plead the case for single crystal development: “With Teal's advice, Morton decided that the development should be based on single crystals of group IV elements. This decision undoubtedly saved us five or ten years.” [Moll 1997]
Diffusion research at Bell was vital for a major programme to develop a semiconductor version of the cross-point switch used in telephone exchanges.
In his Nobel Prize lecture given in 1956, Shockley recalled an early meeting with his first boss, Dr Mervin Kelly then Director of the Laboratory, in 1936: “Dr. Kelly spoke to me of his ideal of doing all telephone switching electronically instead of with metal contacts.” [Shockley 1956] Kelly wanted a solid state replacement for mechanical cross point switches. The PNPN diode was a major project at Bell Laboratories and Bell’s first opportunity to deliver on the Kelly vision. A fateful feature of the proposal was to seek a solid state functional equivalent of the mechanical relay. Bell needed to maintain compatibility with its legacy equipment, but the PNPN diode did not prove to be the route to commercialising solid state devices in its telephone network.
Ian Ross recalls “Now, the other project that I got assigned was the PNPN diode. And one of the things that Shockley analyzed in that miraculous Christmas-New Year's period in 1947 and '48 was the PNPN diode... he recognized that a PNPN device, as distinct from a three-layer device, would have an alpha greater than unity. And therefore, it could be unstable, and it could have two operating conditions, one where it acted like a reverse-biased junction and the other where it acted like a forward-biased junction. So that was an interesting device that Bill had analyzed. And it was recognized that it could have a very important role in AT&T switching equipment.” [Terman 2009]
A theoretical review of the PNPN switch was carried out by Jim Ebers of Bell and published in 1952. Elbers credits its roots to Shockley’s observation of a PNPN device unintentionally created in formed point-contact transistors where an artefact of the forming process created a third junction at the collector (hook collector) and an analysis given by Shockley in his book Electrons and Holes in Semiconductors. [Shockley 1950]
More famously, Shockley attempted unsuccessfully to produce a viable PNPN switch when he left Bell and formed Shockley Semiconductors. For these reasons the PNPN switch is now known as the Shockley diode.
John Moll was hired by Jack Morton and started at Bell in 1952 and recalls his first assignment “was to try to understand the switching properties of junction transistors. The first "product" was the Ebers-Moll model for switching behavior.” [Moll 1997]
He notes that already the diffused base transistor was already known: “The "step junction" transistor was easiest to analyze but germanium transistors where an N-type base was first diffused and then a thin layer either alloyed or diffused for the emitter were being demonstrated.” [Moll 1997]
Moll’s first device assignment was to develop a PNPN switch. Moll analysed the issues and concluded the requirement for three junctions in a single device “eliminated most of the existing technology and required some new developments. The high off impedance that is required in voice switching required very low leakage junctions.”
He recommended that the:
At least one of the junctions must be diffused (because of the need to produce two junctions from one side of a wafer).
“The management at Bell read that particular memo and generally supported the conclusions. There was never any doubt about the necessity of using silicon as the crystal. The reverse leakage current in a germanium p-n junction could not satisfy the central office requirement for high “off state” impedance.” [Moll 1997]
The project commenced in 1954. The requirement that the device would have to be based on silicon posed immense technology issues as silicon was in its infancy (the first silicon transistor was announced by Texas Instruments in 1954). Nick Holonyak and Carl Frosch were part of Moll’s team and worked on impurity diffusion. Morris Tanenbaum who was working on the silicon diffusion transistor was part of the team. In the course of this work silicon dioxide masking was discovered by Carl Frosch. Issues such as insufficient silicon purity and crystal defects resulting in inadequate minority carrier lifetime and inconsistent properties had to be solved. Metal thin film technologies for the emitters were developed (Goldey and Holonyak). [Moll 1997]
When James Goldey started at Bell his first assignment was to work on an alloy-silicon PNP transistor. The standard method used in the germanium alloy junction transistor was to use tiny pellets of dopant metal alloy (usually an indium alloy) and fuse them to the wafer. Goldey was trying to use evaporated emitter and collector contacts which had the potential to achieve more control over the placement and quantity applied.
This work was abandoned when Tanebaum developed his silicon diffused transistor but the work on evaporated metal contacts continued in support of diffused silicon transistor and the PNPN diode. Goldey recalls events following the Tanebaum discovery: “Our department head was summoned up to Jack Morton's office and he said, "It's diffusion, isn't it? Why don't we forget the alloy?" And we did it at least as a basic kind of structure. Several of us in John's group then went on to the PNPN diode.” [Riordan 2009] Here Goldey’s experience was important since evaporated contacts were needed to make shallow contacts on the diffused layers. And alloying remained important for making diffused transistors and the alloy version of the PNPN diode.
“That led into a whole study of how to alloy aluminum. Nick [Holonyak] discovered that, if you held the temperature of the substrate between the eutectic and the melting point, that you could get a fairly uniform layer, because the problem was that it alloyed irregularly. I then discovered that you could do it a somewhat simpler way by pre-cleaning with a heater strip and that when wafer was in the heater strip, heat it to about 800 degrees C in the evaporator, and then evaporate and you've got good junctions.”
Nick Holonyak confirms this: “Using the evaporator in Moll’s group, Goldey began trying to determine how to
Goldey also worked on how to evaporate gold-antimony on silicon in order to produce contacts to n-type silicon used by Lee in his diffused base transistor. Gold-antimony films could also be subsequently alloyed to form shallow n-type layers on p-type substrates. [Holonyak 2007]
Picture: One of the BTL evaporators employed in 1954-55 to prepare shallow p (aluminium) or n (gold and antimony) contacts or junctions in Silicon diffused base transistors. [Holonyak 2007]
The PNPN switch programme was a major driver of the technologies that could be applied to silicon diffused transistors. Work on germanium diffused transistors proceeded in parallel.
Charles Lee made the first diffused base germanium transistor in 1954;
Nick Holonyak made the first PNP diffused base silicon transistors using ring dot geometry in the period 1954-55; and
Morris Tanenbaum produced an NPN diffused device the following March in 1955 using simultaneous diffusion to form the base and emitter.
While these researchers are credited with developments they were all team efforts depending on Fuller’s work on impurity diffusion and team work on evaporated metal contacts and alloy junctions from these.
The Bell prototypes were hugely successful transistors by the standards of radio frequency performance of the day: Lee’s transistor performed at up to 500 Mhz and the Tanenbaum transistor operated up to 120 Mhz.
At this time other manufacturers were struggling to make transistors using grown junction or alloy technology adequate for a broadcast band radio. An important key to high frequency performance is minimising minority carrier transit time across the base by increasing their velocity or reducing base width. (Others include reducing base resistance and collector-base capacitance.) Thus forming very thin base layers was integral to high frequency performance. This was difficult to achieve in the alloy junction transistor because of the probability of shorting the base between the collector and emitter. By 1955 alloy junction RF transistors were emerging and were made by careful production then segregating them according to performance and branding accordingly. For example, in the case of Raytheon, into the CK759-761 series that covered IF and RF applications to 10Mhz.
Soon after Lee and Tanenbaum published their work in January 1956, RCA revealed their 2N247 drift transistor which for its day had a respectable 30 Mhz cut off frequency as well as being commercially available.
Late in 1954 Holonyak made early prototype diffused base, alloyed emitter silicon PNP transistors. These transistors were made starting with a wafer of p-type silicon that would eventually become eight transistors and diffusing in phosphorous to make the diffused base layer. The wafer was masked and eight aluminium emitter dots were evaporated onto the wafer and alloyed creating shallow p-type silicon layer under the spot. Contact with the base layer was made by evaporating a ring of gold-antimony alloy around the emitter dot. Each transistor was masked and etched to form mesa transistors that could be cut from the wafer and mounted.
These early transistors had relatively poor performance with alphas of only 0.1-0.2 due to poor emitter efficiency. The solubility of aluminium in silicon was too low and the base doping too high to yield efficient emitters. Alphas improved once better control over the base doping was achieved.
Charles Lee worked on making diffused base germanium PNP transistors using simple masking techniques that gave yields of eight transistors per wafer.
His prototypes were produced from p-type germanium bars 200*60*15 mils cleaned and etched prior to diffusing with arsenic to create an n-type base layer. Diffusion was carried out in small molybdenum capsule heated by a tungsten element within a vacuum oven. In order to control the vapour pressure of the arsenic down to desirable levels it was diluted in germanium.
The base and emitter were made by thin film evaporation using a masking jig to permit the simultaneous evaporation of eight pairs of contacts for each bar. For the emitter a film of aluminium 1000Å thick and 1*2 mils area was evaporated onto the surface. This was alloyed to form the emitter by brief heating. To create the base contact a film of gold-antimony alloy 3000-4000Å was evaporated onto the surface. This matched the dimensions of the emitter and was placed between 0.5-1.0 mils from it. The bar was again heated to alloy the base connection.
The bars were then sliced into individual units and mounted on a platinum tab to form the collector contact using indium solder to alloy through the evaporated n-type layer to underlying p-type germanium.
Lastly a mesa structure was formed by masking the emitter and base contact areas with a dot of wax 6-8 mils in diameter and etching away the exposed diffused n-type layer.
The transistor was then mounted on a header and base and emitter connections made with phosphor bronze wire spring contacts shown in the following photo. [Bell Record December 1956 courtesy Joe Knight]
Transistors of this kind had an RF performance of up to 500 Mhz. They had base widths of 0.06 mils and the diffusion process created accelerating fields that increased the performance further by increasing the minority carriers velocity. [Lee 1956 Drawing from Thomas 1956] A prototype transistor from this era is shown below. [Courtesy Joe Knight]
Tanenbaum’s transistors were based on Fuller’s work on relative diffusion rates of donors and acceptors in silicon. Tanebaum obtained NPN structures with two diffused layers in which the collector was the original n-type wafer. [Tanenbaum 1956]
The art in such structures is how to achieve effective contact to the base layer without shorting it to the emitter or collector. Tanenbaum first tried grinding a bevel at a very low angle on the wafer in order to expose more of the base and alloyed an aluminium wire to the base region but recalls “I could not obtain a high enough alpha to give power gain. I assumed that the polishing had disturbed the surface introducing crystal imperfections and decreasing carrier lifetime. I tried careful etching of the polished surface without success. After several weeks and many samples, various annealing experiments, etc, I was becoming very frustrated.”
One evening while working late he concluded “why not try the obvious way of simply melting the aluminum wire directly through the heavily doped N-type layer that covered it. I did not expect that to work because the N-type layer was so heavily doped that it was more metallic than semiconducting and would probably short circuit to the melted aluminum wire.” He did so and observed the characteristics of a good transistor with an alpha of 0.98. “Apparently, as the aluminum wire solidified, it created a p-n junction with the heavily doped N-type layer permitting excellent transistor action.” [Tanenbaum 2008] The breakthrough occurred on 17 March 1955 with the comment in his lab book “Now I’ll try the direct approach. This looks like the transistor we’ve been waiting for. It should be a cinch to make.” [Colburn 1999]
Prototypes were made by simultaneous diffusion of antimony and aluminium into n-type silicon. The base contact was made by evaporating a thin line of aluminium on to the wafer which was alloyed through to the base layer in a second step. Then the region around the base and emitters connection was masked and the remaining unwanted diffused layers etched away leaving a mesa structure. The collector contact was made by soldering the wafer to the header. Contact to the base was made by a tungsten point pressure contact to the aluminium. Contact to the emitter was made in a similar manner using a gold-antimony plated tungsten contact fused to the surface of the emitter through an electrical pulse. [Photo Tanenbaum 1956]
The high frequency performance of the new transistor was exceptional and well ahead of anything previously achieved being “an order of magnitude higher than the known cutoff frequencies of earlier silicon transistors.” [Tanenbaum 1956]
Tanenbaum recalls the excitement that the silicon transistor created: We “had the top management of Bell Labs in my lab, with the exception of Jack Morton, the Vice President of Device Development, who was on a business trip in Europe. When the news reached Jack, he cancelled his trip and rushed back to Bell Labs. Soon, his division was devoted to silicon. In the interim, we published our work in the Bell System Technical Journal, and a symposium on silicon technology was held for all our semiconductor licensees.” [Tanenbaum 2008]
Photo of a diffused transistor produced for demonstration purposes showing very similar construction to the Tanenbaum transistor. [Photo courtesy Joe Knight]
Oxide masking was discovered by Carl Frosch in 1955 during the course of Bell’s efforts to produce the PNPN diode. In a series of experiments they began with a p-type wafer and diffusing n-type layers on both sides producing an NPN wafer. One side was then alloyed with an evaporated aluminium contact creating a PNPN diode.
Holonyak recounts how an oxide layer was first observed : “During the process of making these n-type diffusions, particularly the drive-in phase of the donor diffusion at higher temperature in a hot, dry gas (typically hydrogen), Frosch would seriously damage our wafers. They would be eroded and pitted, or even totally destroyed. Every time this happened, the loss was immediately apparent from the expression on his face when he told us the bad news. We would make some adjustments, get more silicon wafers ready, and try again.
One day early in the spring of 1955, I came into Frosch’s laboratory and encountered the same long face as he commented, “Well, we did it again.” By this I thought he meant that my wafers had been destroyed once more. But then he cracked a broad smile and showed me the silicon wafers in his hand. They were surprisingly smooth and green in color—due to interference in a thin surface layer! He and Derick had inadvertently switched from dry-gas impurity diffusion to wet-ambient (water vapor plus carrier gas) diffusion. It happened because the exhaust hydrogen accidentally ignited and flashed back into the diffusion chamber, thus making water vapor that covered, reacted with, and protected the silicon with an oxide layer. It was a golden accident.” [Holonyak 2007]
Frosch and co-worker Link Derick quickly characterised the properties of the oxide layer and diffusion conditions that were protective. They discovered that in addition to its ability to protect the wafer against erosion and pitting during diffusion the oxide could be used to selectively mask the diffusion of some donor and acceptors at elevated temperatures and how this could be used to create new transistor structures: those in which both the diffused base and emitter could be contacted at the surface.
Their results were circulated internally at Bell in a Technical Memorandum dated July 1955 [cited by Holonyak 2007] and a substantial review was published by them in 1957 [Frosch 1957]. In summary the authors described:
(a) Use of oxidising diffusion atmospheres using partial pressures of water, carbon dioxide or oxygen to protect silicon during diffusion.
(b) Predisposition by low temperature diffusion followed by high temperature “drive in diffusion” in protective atmospheres.
(c) Use of an oxide layer to mask the underlying silicon from dopants such as arsenic, antimony and boron.
(d) Selective or complete removal of the oxide layer by etching with hydrofluoric acid
(e) Ability of some dopants such as gallium to diffuse through the oxide layer which meant that gallium could be diffused in a second step without removing the oxide layer.
(f) A double diffused transistor made by Tanenbaum in which he avoided the need to alloy a base contact through the emitter layer (as was the case in his first double diffused transistor) thereby simplifying its production.
The process steps in the production of this transistor were:
(1) Formation of an oxide layer on n-type silicon by heating at 1200°C for an hour in wet nitrogen.
(2) Mask the base area with wax and etch the oxide away from the emitter area
(3) Pre-diffuse arsenic at 235°C then drive in at 1200°C in a protective oxidising atmosphere to form an n-type emitter except where masked
(4) Diffuse gallium at 900°C and drive in at 1200°C
in a protective atmosphere.
Since gallium is not masked by the oxide layer, its concentration profile is the same under the masked and etched areas. The emitter remains n-type because it is overdoped with arsenic on the surface. [Frosch 1957]
Coupled with the use of more sophisticated masking techniques such as photo-resist that were developed for semiconductor production later “Frosch and Derick’s discovery of the protective oxide layer and its masking was a fundamental, revolutionary development in semiconductor technology. Without it, all the forms of planar, metaloxide- semiconductor (MOS) devices that came later, and are now so prevalent, would not exist.” [Holonyak 2007]
In the mid 50s photolithographic techniques were already in use in electronics for making printed circuit boards when Jules Andrus and Walter Bond at Bell Labs adapted them for exposing masks onto germanium or silicon crystals or, in a later development, to mask a silicon dioxide protective layer formed on a silicon wafer.
Holonyak witnessed the early developments in photo-resist technologies: “Another area of silicon technology in which Bell Labs made major contributions was photolithography A few doors down from where we worked in 1954-55, J. Andrus and W. L. Bond were developing photoengraving techniques to define geometrical patterns on metal and semiconductor surfaces. Bond thought that photolithography would have an important role in device processing, and he proved correct.” [Holonyak 2007]
Masking germanium or silicon wafers was useful in order to obtain accurately defined evaporated or electroplated metal contacts with geometries not achievable by shadow masking methods.
The shape required was drafted in large scale and photo-reduced onto a photographic film negative. Well polished germanium and silicon wafers were coated in a photo resist, aligned against the patterned film and exposed to ultraviolet light which hardened the resist. Unexposed resist was washed away.
The wafer could then further processed: For example, by etching the exposed silicon or germanium or by metal coating. In the latter case a metal coating was obtained on the areas not protected (because solvent removal of the resist removed any metal over-coating the resist).
More usefully, photo-resist techniques could be used to create intricate silicon dioxide masks once etchants were discovered that could etch the oxide coating without damaging the resist. In his 1957 patent Andrus pointed out “in the past it has been difficult to etch selected areas of the oxide layer on silicon without, at the same time, removing portions of the photo-resist coating. It has, therefore, been impractical up to this time to utilize the precise masking techniques of the photoengraving art in combination with the highly advantageous silicon masking methods taught by Derick and Frosch.” Andrus found that ammonium bifluoride solutions were safe etchants. [Andrus 1957; 1958]
The stepping transistor was invented in 1955 [Ross 1955] as a development out of the PNPN switch programme. Ian Ross recalls: “What we produced was a stepping transistor with four steps on one piece of silicon. And they were in fact PNPN structures. And they were interconnected within the semiconductor such that the first device, when it was closed, leaked charge into the one on its right. So when the next pulse came in, it shifted from one to two.” [Terman 2009]
An improvement made through the application of photo-resist techniques used a circular geometry. “The first application of these techniques was in the fabrication of a stepping transistor, which was developed in my group. Andrus made the oxide windows. The stepping transistor was designed to perform a counting function much like that of a shift register.” [Ross 1998]
The Stepping Transistor was an example of functional device technology that Bell sought in which single devices would do the job of several circuit elements. Sadly “although the device worked, it turned out to be a wrong solution to an important problem.” [Ross 1998]
The stepping transistor was used to exemplify the Andrus patent and consisted of four PNPN switches arranged in four quadrants of a circle. [Photo D’Asaro 1959]
To achieve the required design, two oxide mask stages were required produced by photo-lithography.
In 1958 Aschner and co-workers at Murray Hill demonstrated a double diffused silicon high frequency transistor produced by oxide masking and illustrated the improvements obtained over the Tanenbaum transistor. At this time photo-lithography was used only in lab developmental work.
The upper drawing (A) shows the conventionally diffused unit after Tanenbaum with its base connection alloyed through the emitter layer.
The lower drawing (B) shows the result of using oxide masking to limit the emitter diffusion to an area of 3*6 mils. [Drawing Aschner 1959]
100 transistors were made on each wafer using the following process steps:
n-type wafers were lapped, cleaned and heated in a tubular furnace in an atmosphere of wet hydrogen to create a protective oxide layer.
Gallium was diffused through the oxide to create a base layer of about 0.2 mils
100 windows were then etched through the oxide using Andrus’ photo-resist method. Each window, 3*6 mils in area represented the emitter region of one transistor on the wafer.
The second diffusion using phosphorous as the impurity created the n-type emitters 0.1 mils deep at the site of each window. Oxide resists phosphorous diffusion limiting the emitter regions.
The oxide was then removed and in two steps the base and emitter contacts were evaporated on to the exposed surface through masks carefully indexed with respect to the original film mask.
The mesas were then etched.
Transistors were produced with typical base widths of 0.08 mils and 0.03 mils the latter giving excellent high frequency performance with an alpha cut-off frequency of 350 Mhz. [Aschner 1959]
In 1954 efforts to achieve credible radio frequency performance utilized designs such as the tetrode, the surface barrier transistor and optimized alloy junction transistors. In this “pre-diffusion” era these structures were all variants on the alloy junction transistor. Designers focused on thinner base regions, lower series base resistance, and reducing the area of the emitter and collector. Trade-offs were required: for example, series base resistance could be reduced by increasing base doping but this increased collector capacity and decreased collector breakdown voltage.
Ian Ross recalls the development of the alloy PNIP transistor (where “I” indicates an intrinsic or lightly-doped layer). “Jim Early was struggling [with it] to produce a high-frequency germanium transistor. And Jim came up with the PNIP transistor, which would create a collector area in which the capacitance was determined by the i-region, and the series resistance by the heavily-doped p-region. So that would solve the problem, if you could make it.” [Terman 2009]
James Early’s best transistors oscillated at 95 Mhz and showed a gain of 20db at 10 MHz but “calculation shows that units may be designed to produce 10db or more gain at 1,000 mcps (1 GHz).” The intrinsic semiconductor layer between the base and collector reduced collector capacity and enabled a lower resistivity base and collector without adversely affecting collector breakdown voltage.
These transistors required wafers with a thick intrinsic layer and thin n-type skins: something almost impossible to make. One approach utilized grown junction technology starting with intrinsic semiconductor and doping with arsenic to create a doped base region 0.5-1.0 mils thick then snatching the crystal from the melt. Alternatively, intrinsic wafers could be alloyed and diffused from the surface with lead-antimony or lead-arsenic mixtures. Then the familiar problem of making RF alloy junction transistors remained: how to control the alloying process to avoid shorting the base.
Early’s theory on intrinsic layer designs showed that “PNIP or NPIN germanium junction triodes will serve as oscillators and perhaps amplifiers at frequencie
s as high as 3,000 mcps” but the technologies of the time did not their realisation. [Early 1954] “Not only did Early invent the theoretical solution to a vexing design problem, he had the distinction of being the only person other than Shockley to propose a basically new transistor structure.” [Ross 1998] Picture right: From Electronics October edition showing a UHF PNIP transistor.
Epitaxy refers to the growth of new crystals on a monocrystalline substrate in which the substrate controls the crystal orientation of the new growth. The term was invented by Royer in 1928 although the phenomenon was previously known, for example, in mineralogy where “epitaxial outgrowths” are observed in nature (one mineral growing on another). [Royer 1928]
In 1951 Howard Christensen and Gordon Teal at Bell developed an epitaxial method of depositing germanium from the vapour phase on single crystal germanium and showed how this method, with the appropriate use of donor or acceptor impurities, could be used to make doped epitaxial p-n junctions. In their method germanium was produced by heating the iodide. They found the films “were of single crystal structure, with the same crystallographic orientation as the discs and substantially strain free.” Their work should be seen in the context of efforts to produce grown junction transistors and not the modern semiconductor context of epitaxy. [Christensen 1954]
While not clearly understood at the time, Hall’s invention, the alloy junction rectifier was an example of liquid phase epitaxy as discovered by Albert English at General Electric. [English 1952] Alloy junctions depend on recrystallisation of doped alloys with the same orientation as the wafer.
Huge gains had been made by using diffusion to reduce base width and base resistance. Further gains were limited by collector resistance and capacity.
Gain at any frequency is improved if the collector series resistance can be kept low: A high collector resistance reduces gain because power is dissipated at the collector that would otherwise be coupled to the load. Reduced resistance can be achieved by increasing the level of doping of the wafer that becomes the collector but this is at the expense of increased collector capacitance and lower collector breakdown voltage.
Re-visiting the James Early’s work on the PNIP transistor, Ross realised that Bell already had the technology to solve the problem: “And one morning, it was very early, it suddenly occurred to me that we probably had such a process already available to us. Because I knew at that time that Henry Theuerer was growing single crystals of silicon by depositing from a vapor of silicon tetrachloride. And he was growing single crystals, and he was of course growing doped crystals. Well, it seemed to me it was pretty obvious that if he could do that, he ought to be able to switch the doping mechanism and produce a high resistivity layer on top of the heavily-doped layer.” [Terman 2009]
In 1960 Theuerer and co-workers, Kleimack, Loar and Christensen published a short letter on both germanium and silicon epitaxial transistors contrasting performance with a diffused transistor of similar geometry but without an epitaxial layer. In the new transistor “the junction characteristics are controlled by diffusing the base and emitter into a thin, high resistivity layer. The main body of the collector is a very-low resistivity material. Such a structure possesses all the advantages of conventional diffused base mesa transistors and eliminates many of the disadvantages.”
In the case of silicon, the team began with low resistivity N-type silicon and created an epitaxial layer several microns thick by decomposition of silicon tetrachloride. Then the base and emitter were diffused using conventional boron and phosphorous processes.
In a medium power silicon switching transistor with an emitter 2*20 mils switching time was improved by a factor of 10 without degrading other characteristics. [Theuerer 1960]
“The challenge of producing the desired doping profile across a wafer had finally been solved with the addition of the epitaxial process to those of diffusion and alloying. We now had the fabrication degrees of freedom that we needed.” [Ross 1998]
The symposium hosted by Bell in January 1956 was largely directed to bringing the Bell licensees up to date on the breakthroughs Bell had made in diffusion technology.
By 1956 the early phase of transistor development was relatively mature and firmly centred on germanium alloy junction transistors. With careful control over production and post production selection these could be made operable in the RF stages of transistor radios, AF applications such as hearing aids and modest power applications. At this time there were at least 23 US companies making transistors. [Tilton 1971] In addition 15 companies in the USA alone were making silicon alloy diodes. [Smits 1985] Better performing transistors were only just emerging: for example, the RCA drift transistor released in 1956.
John Hornbeck who was closely associated with the Bell’s semiconductor physics at that time notes “from the point of view of the licensees, in the short term, diffusion did not appear timely for the needs of the commercial market except as an adaptive add on technique for improved frequency response, where this was required. Thus the symposium aroused little enthusiasm among the licensees to undertake and master the major change in technology represented by diffusion.” [The Transistor from Smits 1985]
Fairchild were first to benefit from Bell’s research. They introduced the 2N696 and 2N697 at the Los Angeles Wescon Convention in August 1958. Their technology had come from Bell thanks to Bell’s comprehensive technical assistance for Shockley Semiconductor where the Fairchild founders had worked until they left to form Fairchild in September 1957.
While Western Electric announced its 2N560 at the same convention its applications were restricted to space and military applications. The Fairchild transistors launched the company and gave it a leadership position in mesa and planar double diffused silicon transistors for commercial applications.
The earliest entrant with a diffused silicon transistor was Texas Instruments that introduced the 2N389 power transistor in 1957.
Transfer of the technological advances within Bell Laboratories into robust commercial devices was carried out by Western Electric. Its markets were restricted by the 1956 settlement of the 1949 Federal antitrust suit to its own communications and telephone services and for Government: military and space applications.
The demands of the military were fundamentally different from mainstream consumer applications for transistors. A major driver was the Nike ABM programme and associated radar guidance which required new functionality, often digital, requiring high speed switching and of course high reliability.
Bill Hittinger worked on the commercialisation of diffused transistors: “We had a great struggle making successful transistors, primarily because of external impurities that kept getting into our system, and irregular wafers and the like. But through hard work and repetitive efforts, working with our model shop at Murray Hill, we succeeded in making some pretty decent transistors. Then we fed those into our military and ESS (Electronic Switching System) groups at Whippany who were very interested in silicon. Just plain hard work, I think, cleaning up structures, getting better silicon, better silicon crystals. Through experience we were able to generate a fairly decent yield of the high-gain transistors that caught the attention of our users. From there we transferred that activity to [the Western Electric plant at] Allentown, where they went into the design for manufacture, using these transistors primarily in electronic switching systems at that time.” [Riordan 2009]
The 2039 was the Bell development number for the family of transistors that were developed out of Charles Lee’s diffused base germanium transistor. It was developed under contracts with the Signal Corps Engineering Laboratory and completed mid 1956 to create a transistor oscillator with 100-200 mw collector input power and 200 MHz service. The work completed was described 18 months later by Warner, Early and Loman. [Warner 1958] Their publication shows that the basic geometry of the device was similar to that used initially by Lee as indicated in the following diagram.
The new design showed the following evolution from Lee’s transistor:
The evaporation and alloying was carried out in a manner developed by Lee and the mesa structure created by applying a wax resist through a rectangular hole in a metal mask and then etching away the unwanted N-type skin of the wafer with a jet of CP-4 etch.
The transistor was mounted on a stud within the transistor header and contact made to the emitter and base stripes using spring contacts. These were difficult to align: “Mounting the contacts is a far more delicate operation than mounting similar contacts in point contact transistors where only point spacing is important. In this unit, contact must be made to a specific area of the transistor wafer, and at the same time the spring holder must be welded to the header pin.” [Warner 1958]
By late 1957 the spring contacts of the original Lee design had been replaced with 0.4 mil gold wire bonded to the emitter and base stripes giving more reliable contact, easier assembly and greater shock resistance as shown above and below.
The 2039 was commercialised as the Western Electric GA53194 as in the following example from 1957. [Photo courtesy of Joe Knight]
Design support for the development of germanium diffused base transistors was provided by Bell at Allentown and Murray Hill (Ryder and Early at Murray Hill). Manufacture was centred at the Western Electric facility at Laureldale and then at the Reading Pennsylvania plant.
In 1957 laboratory support for Western Electric was improved when a taskforce seconded from Allentown and Murray Hill was set up at Laureldale. Sture Esktrand from Bell, Allentown, was the task force leader [Smits 1985] Ekstrand went on to become Director of Bell’s semiconductor device and electron tube laboratory
The Laureldale germanium diffused base types were:
2N509 100 Mw oscillator at 100MHz
2N537 100 Mw oscillator at 250 MHz
2N559 20 Mhz switching transistor
2N694 Small signal video transistor
Some interim information on the development pathway of the Western Electric diffused transistors is given here.
The 2N559 was developed for large volume applications for the Nike Zeus missile defense network. This required mechanisation replacing the many slow manual production operations used in its prototypes. This work was funded by the USA Government under a “Production Engineering Measure” PEM contract.
“Early forecasts of the Nike Zeus missile defense network indicated that large quantities of 2N559 and 2N1094 transistors would be required. Since many transistor manufacturing operations were slow, manual operations, it was evident that the production capability would have to be increased by mechanizing various operations.
Early production examples of the 2N559 show manufacturing technologies similar to the original development of the M2039. By 1962 the development of the transistor under the PEM contract was complete. The final report summarised key production steps:
“The"P" type germanium slice used in manufacturing the 2N559 transistor is diffused with antimony to form an "N" skin on its surface. Since the "N" skin is formed on all external surfaces it must be subsequently removed from the unpolished side by etching. After a clean-up etch a copper backing is evaporated onto the unpolished side of the slice.
Following an additional clean-up etch, gold and aluminum base and emitter stripe pairs are evaporated onto the polished side of the slice. The aluminum emitter stripes are permitted to alloy into the germanium slice forming a "P" region in the "N" skin.
The active area of the 2N559 transistor wafer is surrounded by a moat deep enough to penetrate through the "N" skin into the "P" region. This moat is formed while the material is still in the slice form by use of an ultraviolet light-sensitive material, suitable masks and etchants. This process forms a physically undamaged active area with the evaporated stripe pair in the center.
Following the moating process the semiconductor slice is scribed for subsequent breaking into wafers by the Slice Scribing Machine.” [Reppert 1962]
The moat achieved the same functional result as the mesa structure by electrically isolating the diffused N region around the base and emitter elements from the diffused N layer on the rest of the wafer.
Development of the 2N559. From Left to Right bottom: date code of transistors in inserts: 952, 003 and 239A. Corresponding can styles shown in top row. Base is on the left (gold).
The 1962 version of the transistor exhibits two additional obvious features: no evacuation pip and an amorphous coating over the wafer (and the connecting leads).
The wafers were assembled on the header and gold leads bonded to the base and emitter strips. The headers were then “lightly etched with hydrogen peroxide, rinsed with deionized water and partially dried with a methanol dip. Drying is completed in an infrared drying chamber. The purpose of the etching operation is to clean the transistor active area of greases and foreign particles. Immediately after etching, the devices are placed in a 300oC baking oven. This bake passivates the surface of the semiconductor material and stabilizes the electrical characteristics of the device. Following the 300oC bake, a protective coating of Si02 , silicon dioxide, is applied to the top surface of the transistor and header. The purpose of this coating is to protect the transistor junctions from foreign particles. All devices after coating go into a 200oC pre-weld bake. This bake drives out any gases which may have been trapped by the silicon dioxide coating and also dries the coating itself by driving off any moisture.” [Reppert 1962]
From around 1962 evacuation through the top pip was replaced by the use of a getter: cans were loaded with nickel powder and sintered to form a porous nickel sponge then a moisture getting material (barium htydroxide) was added and amalgamated with the sponge by heating. [Photo: view of the getter material]
The cans were gas flushed and resistance welded to the header. [Reppert 1962]
On the tenth anniversary of the announcement of the transistor the 2N560 went public and with it the commercialisation of a remarkable ten years of development from the crude point contact transistor shown to the world on June 30th 1948 to the embodiment of technologies that became the foundation of the modern semiconductor era.
The concepts in the work established by Tanenbaum and Fuller were developed into the 2N560 transistor by Lew Miller at the Laureldale plant of Western Electric. The transistor was announced at the Los Angeles Wescon Convention in August 1958. Initially the transistor adopted the ring-dot geometry pioneered by Nick Hollonyak and the production of multiple transistors on a single slice. Within a year, however, the ring-dot geometry had been replaced by parallel stripes.
The process began with a half inch square n-type silicon wafer on which up to 99 transistors could be made simultaneously. Miller noted that “One of the advantages inherent in diffusion techniques is the fact that many devices may be made from the one set of junctions formed in a large area semiconductor slice.”
The p-type base layer was made by diffusion of gallium made in situ by heating gallium sesquioxide in a wet hydrogen atmosphere creating a layer 0.2 mils thick. The emitter was made in a second step by heating phosphorous pentoxide in dry oxygen creating an n-type layer 0.1 mils thick.
An aluminium ring base contact and a silver dot emitter were evaporated through evaporation masks. The aluminum base contact was alloyed through the emitter layer into the p-type base layer and the silver emitter dot was alloyed to the n-type emitter layer. The original n-type material constituted the collector body.
Up to 99 transistors were made on a single wafer and all processes were carried out using indexed shadowing masks to create the aluminium base ring connection and the emitter dot alloyed contact. Etching resist was provided by a wax coating sprayed onto the wafer through a metal mask. Each transistor was formed by etching away the N and P layers outside the base ring leaving the familiar mesa structure. In addition, a moat was etched between the base ring and emitter dot in order to isolate the emitter from the base by eliminating the high conductance surface layer.
Each transistor was mounted onto a gold plated header and connections made to the base and emitter by 1 mil gold wires by means of thermocompression bonding. These wires were bonded to flared nickel tubes designed to facilitate the bonding process.
At the time of its announcement the 2N560 had been in development for over a year with 10,000 hours of testing of the first prototypes and other transistors were in the pipeline based on the same technology:
“Although the 2N560 transistor is characterized as a logic amplifier, several of the performance parameters to be discussed indicate its wide range of applicability. As a consequence, the 2N560 has become a prototype device. Several variations on the basic design are now entering the pilot production phase. These include a high frequency amplifier for small and large signal applications and a high speed high current switching transistor for use in the one ampere range.” [Miller 1958]
Bell soon dropped the ring-dot structure as indicated by the following pictures charting the development of the transistor in the period to 1964. Early transistors date coded week 47 of 1958 show what became the standard stripe geometry:
The contacts are approximately 2 mils wide and separated by 3 mils. The base contact is 6 mils long and the emitter is 4 mils long. The mesa is 15 mils in diameter and the dice 28 mils square.
The evolution of the wafer technology and the associated cans is shown in the following composite:
Development of the 2N560: From Left to Right top: date code of transistors in inserts 8/47, 003, and 313A. Corresponding can styles below date codes are 8/47, 934, 404A. Emitters on the left hand side. Insert at the top left shows the rectangular emitter etch slightly larger than the evaporated contact.
In the era of solid state memory its remarkable that in the early days of non-volatile memory each bit required several watts of power to change the state of each stored bit.
The 2N1072 was developed under military contracts for use in missile defense computing systems as a medium power transistor capable of driving magnetic core memories. This service required a high collector-base breakdown voltage due to the high back voltages created, switching of 0.75 amps within 300 nsecs and crucially, in the development of this transistor, low saturation collector-emitter voltage. In common emitter mode it had a unity gain of over 50 MHz.
The first 1959 prototype of this transistor was designed for an on collector-emitter voltage, Vce(on), of below 4 volts (Ic of 0.75 amps) and developed by the same design team that developed the first oxide masked Bell high frequency transistor about a year earlier led by Aschner. The
2N1072 also used oxide masking and the same diffusion regime: N-type wafers were masked with thermally grown oxide and diffused through the mask using gallium impurity to create the base layer. Windows representing the emitters were etched and the emitters formed by phosphorous diffusion. Metal contacts were evaporated and alloyed to the base, emitter and underside. Multiple transistors were made from a single wafer. [Aschner 1960]
The transistor was mounted on a TO-38 header. The wafer was bonded to a molybdenum insert in order to match the thermal expansion of the silicon wafer.
The prototype did not perform as expected with respect to its Vce(on) and exceeded the required 4 volt limit. This was attributed to the observation that emission at high currents was taking place at the edges of the emitter region creating current crowding at the collector and a higher collector series resistance than predicted. Early users confirmed this: “This transistor has two limitations: 1) the saturation voltage, Vce(on), is quite high and variable; at 0.6 ampere Vce(on) will be 2 to 3 volts at a junction temperature of 25"C, while at a junction temperature of 150°C it will be 4 to 6 volts; 2) This transistor exhibits quite long turnoff times due to minority carrier storage.” [Abbott 1959]
By 1961 the 2N1072 had been significantly improved and Vce(on) was specified at 2 volts at 0.75 amps emitter current. To achieve this the emitter and base regions were radically increased (for example, the emitter perimeter from 78 to 120 mils).
The following pictures from a 1961 production lot showing the improved transistor with longer emitter and base strips and the mounting of the wafer and a molybdenum insert in the header:
20 years after the first fragile transistor took the stage, solid state technology had advanced to the point where an all solid state microwave repeater system could be developed.
The AT&T TD-3 microwave repeater system was a solid state modification the TD-2 system (all vacuum tubes) which served the continental US for decades from 1950 and in its time was the dominant carrier of television services and a key component in the Bell telephone network. By 1958 there were 1300 stations covering most large cities in the USA, The system operated at 3.7-4.2GHz. [Curtis 1960]
In 1962 Bell decided to redesign the TD-2 with the TD-3 which would feature all solid state devices with the exception of the travelling wave tube. It moved into production and use in 1968.
Developing new semiconductors for applications that had previously been demanding tube applications could be approached with confidence in 1962: Bell could rely on its exceptionally strong basic technology, sufficient theoretical understanding and its success in bringing new devices to commercialization.
Creating the TD-3 system required the development of twenty new solid state devices including new high frequency planar epitaxial NPN silicon transistors. The new transistors were required for the 70 MHz IF stages and for the FM deviator. The new semiconductors were described in depth in a substantial paper edited by Harry Elder for the Bell System Technical Journal. The section on transistors was written by Norman Chaplin who was active in the development of these transistors.
The 45A transistor was the foundation transistor in the family and was designed for collector currents of 5-10 ma.
Current capacity of others in the series (the 45B, 45C and 45G) was increased by increasing the number of emitter stripes. The 45B, 45C and 45G transistors had twice, four and eight times the collector current rating and one half, one fourth and one eighth the base resistance of the 45A.
Featuring a ceramic base, the TO-112 package was designed to reduce parasitic capacitance and lead inductance and provide good thermal conductivity.
The 45A wafer was mounted in a TO-18 package and coded 44A and used as an oscillator in the FM deviator cavity. The collector could be directly connected to the cavity through its package reducing collector inductance.
The IF main amplifier used 18 of the new 45B transistors chosen as “a compromise between peak frequency and power handling capability” [Fenderson 1968] The broadband IF stages needed an exceptionally flat frequency response over the range 60-80 Mhz driving the requirement for high frequency transistors (0.8-1.0 GHz ft or gain-bandwidth product or frequency at which the gain is unity).
The carrier re-supply unit (required to ensure that a signal was relayed forward in the event of deep fade of the in-bound signal) utilised 45B transistors in the 70 MHz crystal controlled oscillator and first stage amplifier and a 45C in the second output stage. [Fenderson 1968]
Left to Right: 45A Transistor; ceramic header; wafer detail with emitter on the RHS and a redundant 45B structure above it and thermo-compression bonding of gold wire.
The TD-3 system IF preamplifier needed high gain and low noise and here the 45J was used in the first stage which with an ft in the region of 0.8-1.2 GHz gave a gain of about 17dB at 70 MHz. Low noise (typical 2 dB at 12 ma) was achieved by relatively low base resistance of 5Ω by reducing emitter width and increasing emitter length. This was achieved by an interdigitated base-emitter structure.
The diagram of this transistor shows novel use of low resistivity diffused p-type conductors in lieu of the expected metalized base stripes.
[Drawing Elder 1968]
The silicon diffusion journey was motivated by the need for a solid state cross point switch: the PNPN diode. It precipitated an exceptionally productive programme at Bell Laboratories on diffused silicon structures leading to high performance transistors and the new era of integrated circuits. But the next generation cross point switch was a mechanical design: the ferreed switch.
The challenge in implementing an electronic cross point switch was that it needed to be compatible with a range of signalling test voltages or currents. For example, in crossbar systems the ringing signal was 86 volts at 20Hz or in coinbox phones signalling to collect or return coins was at 130 volts DC. These constraints could have been overcome with a redesigned system but Bell wanted to retain compatibility with existing equipment.
The ferreed switch was a bistable reed switch using electronic control that could be latched magnetically reducing power consumption. It exploited the remanence of ferrite materials that can be made magnetic by a pulse from a control coil in one direction and remain magnetic until affected by a pulse in the opposite direction. [Feiner 1960]
Ian Ross recalls: “The p-n-p-n diode later was extensively studied in my development group in the mid-1950’s in the hope of producing a cross-point switch for telephone switching machines. The device turned out to be difficult to control and at that time could not compete economically with a ferreed relay. Much later, it did find use in the switching matrix of some customer premises switches. The properties of the p-n-p-n triode were also explored, and it soon became known as the “thyristor.” This device eventually was widely used in power conditioning applications.” [Ross 1998]
The author would like to acknowledge the considerable assistance of Joe Knight who provided many of the photos in this article, for lending part of his collection so that the microphotographs could be taken and for copies of many early data sheets from his extensive collection.
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