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Shunta Iguchi
  • Top page
  • Research Projects
    • Additional Supplement for JSSC Paper (2016)
    • Intermittent Operation Crystal Oscillator (VLSIC 2013)
    • Parameter Fitting Methodology of Quartz Crystal
    • Quick Start-up Crystal Oscillator (VLSIC 2014)
    • Ph.D. dissertation
  • Biography
  • Publications
  • Address
Shunta Iguchi
  • Top page
  • Research Projects
    • Additional Supplement for JSSC Paper (2016)
    • Intermittent Operation Crystal Oscillator (VLSIC 2013)
    • Parameter Fitting Methodology of Quartz Crystal
    • Quick Start-up Crystal Oscillator (VLSIC 2014)
    • Ph.D. dissertation
  • Biography
  • Publications
  • Address
  • More
    • Top page
    • Research Projects
      • Additional Supplement for JSSC Paper (2016)
      • Intermittent Operation Crystal Oscillator (VLSIC 2013)
      • Parameter Fitting Methodology of Quartz Crystal
      • Quick Start-up Crystal Oscillator (VLSIC 2014)
      • Ph.D. dissertation
    • Biography
    • Publications
    • Address

Biography

[日本語バージョン]

Summary

  • Analog IC designer with 10+ years experiences in industry/academia

    • Lead ultra-low-noise analog IC products development with multi-functional teams (~ 10 ANA/DIG designers)

    • Extensive knowledge and experience on oscillator designs with ultra-low phase noise

    • Solved numerous issues and made it possible for 1B+ product shipment as chip lead and module lead

  • Ph.D. in The University of Tokyo with Dean's Award

  • Multiple work experiences in U.S., Taiwan, and Japan (including internship)

  • 20+ research paper publications including JSSC, TCAS-I, ISSCC, VLSIC, and etc.

  • 10+ granted/pending patents

  • 5+ research awards including best paper award in IEEE WPTC

  • 30+ paper reviews for JSSC, TCAS-I, T-MTT, and etc.

Work Experiences

  • Qualcomm (Hardware Design Engineer) @ San Diego, CA, U.S.A.; October 2016 - Now

    • Senior Staff Engineer: November 2024 - Now

    • Staff Engineer: November 2019 - November 2024

    • Senior Engineer: October 2016 - November 2019 

  • The University of Tokyo (Project Researcher) @ Tokyo, Japan; April 2016 - September 2016

  • TSMC (Summer Intern) @ Hsinchu, Taiwan; August 2014 - October 2014

  • Toshiba (Summer Intern) @ Kanagawa, Japan; August 2013 - October 2013

  • Analog Devices (Summer Intern) @ Tokyo, Japan; August 2011 - September 2011

Educations

  • Ph.D. in Electrical Engineering and Information Systems, The University of Tokyo, Tokyo, Japan, March 2016

    • Dissertation: Research on Low Power RF Circuits and Highly Efficient Wireless Power Transmission for IoT Nodes (PDF download)

  • M.S. in Electrical Engineering and Information Systems, The University of Tokyo, Tokyo, Japan, March 2013

  • B.S. in Electronic Engineering, The University of Electro-Communications, Tokyo, Japan, March 2011

Design Experiences

  • Low-noise crystal oscillator

  • Low-power crystal oscillator

  • Quick startup crystal oscillator

  • Low-power RC relaxation oscillator

  • Low-noise differential ring oscillator

  • High-speed CMOS clock driver

  • Low-noise LDO

  • Constant-gm current bias generator

  • Power amplifier and rectifier for wireless power charging

  • RF class-F power amplifier

  • Bandgap reference circuit

  • RF front-end circuits (LNA, mixer, and IF-amp) for Bluetooth receiver

  • RF passive filter and multiplexer for GPS/Bluetooth/WiFi

Honors and Awards

  • Outstanding Award in NE Analog Innovation Award 2016 from NIKKEI Electronics, Jan. 2017 [Link] [Link]

  • Dean's Award from University of Tokyo (Graduate school of Engineering), Mar. 2016

  • Outstanding Ph.D. Dissertation Award from University of Tokyo (Electrical Engineering and Information System), Mar. 2016

  • MERIT Award from University of Tokyo (MERIT program), Mar. 2016

  • Outstanding Presentation Award in IEICE ICD Workshop, May 2015

  • Research Fellow of the Japan Society for the Promotion of Science (DC2: research funding support in Apr. 2014 - Mar. 2016) [Link]

  • Best Paper Award in IEEE Wireless Power Transfer Conference, May 2013 

  • Outstanding Master Thesis Award from University of Tokyo (Electrical Engineering and Information System), Mar. 2013

  • MERIT scholarship (Full financial support in Nov. 2012 - Mar. 2016) from University of Tokyo

Professional Activities

Total journal review experience: 40+ paper reviews since 2013.

  • Reviewer of IEEE Journal of Solid-State Circuits (JSSC)

  • Reviewer of IEEE Transactions on Circuits and Systems I (TCAS-I)

  • Reviewer of IEEE Transactions on Microwave Theory and Techniques (T-MTT)

  • Reviewer of IEEE Transactions on Power Electronics (TPEL)

  • Reviewer of IEEE Access

  • Reviewer of IEICE Electronics Express (ELEX)

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