CURRICULUM VITAE
Presently I am working as a Faculty on Contract in Department of Electronics and Communication Engineering at Indian Institute of Information Technology, Kurnool. 

Past Achievement: 
1. TI-India Innovation Challenge Design Contest (IICDC) 2016 (Website | Technical Video | Business Video
Successfully become top 10 teams in Texas Instruments Inc. India Innovation Challenge Design Contest 2016 among 11000 participants from 624 colleges of India. Got Incubation of   INR 2500000/- from Department of Science and Technology (DST), Texas Instruments, and anchored by NSRCEL of IIM Banglore for this project. 

Background: 
I have completed my Ph.D in Micro-electronics (2016) at Indian Institute of Technology, Kharagpur, India under the supervision of Prof. Dhrubes Biswas. The title of my Ph.D thesis is "TCAD based simulation, growth and characterization of Nitride-Based HEMT on Silicon for RF Switch Application"    I have completed my two years Master of Technology (M.Tech) program in Microelectronics and VLSI Design from SGSITS, Indore in 2012. In my M.Tech project, I have designed the built in self test (BIST) for 8×8 static random access memory (SRAM) in Cadence tool. I have completed my four years Bachelor of Engineering (B.E.) program in Electronics and Communication Engineering in 2010 from UIT RGPV Bhopal. Many of my courses and project works were related to the field of electronic devices.
During my childhood, I was quite fascinated towards the RF appliances (e.g, how a radio works and convey the message of the messenger to recipients or how we are able to hear the voice of our dear ones residing miles away through a telephone). The desire to know the answers led me to pursue a course of B.E. in Electronics and Communication. During the course of my B.E., once I envisaged a question regarding the internal design of a logic gate and the answer increased my curiosity in the subject of VLSI. It led me to pursue my M.Tech in Microelectronics and VLSI Design. The reading of certain outstanding books during the course of my research such as Streetman‘s ‘Solid State Electronic Devices’, Sze‘s ‘VLSI Technology’, Rabaey‘s ‘Digital Integrated Circuits’ and Razavi‘s ‘Analog CMOS Integrated Circuits’ finally convinced me to pursue a Ph.D. in modelling and fabrication of III-N based devices.
It is worth mentioning that I have got two fellowship from Ministry of Human Resource and Development, Government of India, for pursuing my post graduations and doctoral studies. Beyond my research success (including six journal papers to date and others in preparation), I have been fortunate to obtain knowledge about a broad range of topics. As my curriculum vitae indicates, I have attended several courses taken during my Ph.D. I also have a sound knowledge regarding device fabrication, electrical characterization, device modeling in CAD tool, circuit design and simulation in EDA tool, etc. I have also mentored several undergraduate and post-graduate students during their final year projects.
My primary research goals are directed towards understanding and implementing the principles and concepts of GaN-based electronics at the device (HEMT) level using modeling and fabrication. I have proposed several techniques to model and incorporate the device experimental data for the circuit level design in EDA tool. Model based on experimental data is the state-of-the-art for circuit designing on which I have worked in my thesis. I have also investigated that parameter extraction would be done by the machine learning technique which can be able to capture interesting information about the various model parameters. I have implemented my modeling skills in a large span of collaborative work which addresses major problems in the field of sensor devices, E-mode Nitride devices and particulate matter in air pollution.
I have hands on experience of the fabrication and electrical (RF and DC) characterizations of devices. With the increased probability of the defects and traps in the grown samples, the fabricated devices are having unpredicted results. Through TCAD simulations, the prediction of the deviation in the results due to the presence of the defects and traps can be analyzed properly. Thus, for precise results, the prediction becomes increasingly important and it is also the main aim of my research work. Beside this, I have also explored different modeling schemes like VerilogA model to include the device in an EDA tool for the RF switch design. Moreover, I have worked on machine learning systems like artificial neural network (ANN) and support vector machine (SVM) for parameter extraction of the device.
At this moment, I am applying my fabrication and modeling experience to design and model the E-mode GaN HEMT for the RF applications and development of laboratories for teaching and research. My future research plans are aimed at understanding trapping related issues in the performance degradation of GaN HEMT. My ultimate goal is to discover a universal model that will able to represent every phenomenon occurring.