Chips Gallery

1. Phase-locked loop using single phase voltage-controlled oscillator

a. Technology: 90 nm CMOS

b. Highlights:

• Design of a wide tuning range single phase VCO
• Successfully tested performance of IC using pulsed laser based test setup

2. SET tolerant voltage-controlled oscillators within phase-locked loops

a. Technology: 65 nm CMOS

b. Highlights:

• Design of a SET tolerant VCO employing proposed techniques
• Design of test structures to evaluate SET tolerance of bias circuitries
• Successfully tested performance of IC using pulsed laser based test setup