Assignment 3 - 35 points
Due: Tuesday, October 31
My Problem I: (3 points)
Using one 1-2 Multiplexer (MUX) for each, show how to implement:
an AND gate,
an OR gate, and
a NOT gate.
Hints: There are three inputs to a 1-2 MUX. To implement a NOT gate, use the Boolean input as control, and hard-wire the data inputs with 1 and 0. To implement an AND or an OR, use the two Boolean inputs as the two data inputs, and splice one of the data inputs to the control.
My Problem II: (2 points)
Recall that any function with n inputs can be implemented with an n to 2n multiplexer. Use a 4 to 16 multiplexer (4-16 MUX) to implement w'y'z+w'xz.
Hint: Use the four Boolean inputs for control, and hard-wire the data inputs.
Book Problems:
Chapter 2: 4, 10 (Points: 5, 4)
Chapter 4: 10, 18, 23, 24, 26, 27, 30 31. (Points: 2, 4, 4, 2, 2, 2, 3, 2)
Hint for 30: To avoid making a truth table with 6 inputs and 64 rows, make a "compact" table with only 4 rows, and two inputs s_0 and s_1. The outputs will be from the set {0, 1, I_0, I_1, I_2, I_3}, and your formulas will be in terms of these values. This is similar to what the book does for the AE and LE circuits of the ALU. In general, this kind of trick is helpful when the number of inputs is too big for a K-map.
Hint for 31: Use two 2-1 multiplexers for choosing whether to shift (0) or rotate (1), and four 2-1 multiplexers to choose whether to move left (0) or right (1). The setup of the six multiplexers resembles the general structure in problem 32. Note, the published solution for this problem is incorrect, so do not copy anything you don't understand.