1) Sandeep Navada, N. K. Choudhary, S. V. Wadhavkar, and E. Rotenberg. "A Unified View of Non-monotonic Core Selection and Application Steering in Heterogeneous Chip Multiprocessors", in the 22nd International Conference on Parallel Architectures and Compilation Techniques (PACT), 2013. [pdf] (BEST PAPER NOMINEE)
2) N. K. Choudhary, S. V. Wadhavkar, T.A. Shah, H. Mayukh, J. Gandhi, B.H. Dwiel, Sandeep Navada, H.H. Najaf-abadi, and Eric Rotenberg. “FabScalar: Automating Superscalar Core Design”, IEEE Micro, Special Issue: Micro's Top Picks from 2011 Computer Architecture Conferences (MICRO TOP PICKS), Vol. 32, No. 3, May/June 2012.
3) N. K. Choudhary, S. V. Wadhavkar, T.A. Shah, H. Mayukh, J. Gandhi, B.H. Dwiel, Sandeep Navada, H.H. Najaf-abadi, and Eric Rotenberg. “FabScalar: Composing Synthesizable RTL Designs of Arbitrary Cores within a Canonical Superscalar Template”, in the 38th International Symposium on Computer Architecture (ISCA), 2011. [pdf]
4) Sandeep Navada, N. K. Choudhary, and E. Rotenberg. "Criticality-driven Superscalar Design Space Exploration", in the 19th International Conference on Parallel Architectures and Compilation Techniques (PACT), 2010. [pdf][presentation]
5) N. K. Choudhary, Sandeep Navada, R. Ginjupali and G. Khanna, "An Exploration of OpenCL for a Numerical Relativity Application", in the IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS), 2011. [pdf]
6) N. K. Choudhary, S. V. Wadhavkar, T. A. Shah, Sandeep Navada, H. Hashemi Najaf-abadi and E. Rotenberg, FabScalar, 4th Workshop on Architectural Research Prototyping (WARP'09), in conjunction with ISCA-36, June 2009. [pdf]
7) Sandeep Navada and S. Singh, Speedometer Cum Path Detector using Force Transducers, IEEE student paper contest, 2004.