List of Publications
Journal:
1."Sensitivity of trigate MOSFETs to random dopant induced threshold voltage fluctuations"
Ran Yan, Danny Lynch, Thibault Cayron, Dimitri Lederer, Aryan Afzalian, Chi-Woo Lee, Nima Dehdashti and J.P. Colinge
SOLID-STATE ELECTRONICS, Vol. 52, No. 12, pp. 1872-1876, 2008
2.”Nanowire transistors without junctions”
Jean-Pierre Colinge, Chi-Woo Lee, Aryan Afzalian, Nima Dehdashti Akhavan, Ran Yan, Isabelle Ferain, Pedram Razavi, Brendan O’Neill, Alan Blake, Mary White, Anne-Marie Kelleher, Brendan McCarthy and Richard Murphy
NATURE NANOTECHNOLOGY,Vol. 5, No. 3, pp. 225-229, DOI: 10.1038/NNANO.2010.15
3."LDD and Back-Gate Engineering for Fully Depleted Planar SOI Transistors with Thin Buried Oxide"
Ran Yan, Russell Duane, Pedram Razavi, Aryan Afzalian, Isabelle Ferain, Chi-Woo Lee, Nima Dehdashti Akhavan, Bich-Yen Nguyen, Konstantin K. Bourdelle and Jean-Pierre Colinge
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 57, NO. 6, pp. 1319-1326, JUNE 2010
4."Investigation of high-performance sub-50 nm junctionless nanowire transistors"
Ran Yan, Abhinav Kranti, Isabelle Ferain, Chi-Woo Lee, Ran Yu, Nima Dehdashti, Pedram Razavi and Jean-Pierre Colinge
MICROELECTRONICS RELIABILITY, VOL. 51, NO. 7, pp. 1166-1171, JULY 2011
Conference:
1."3D Simulation of Doping Fluctuation Effects in Trigate FETs"
Ran Yan, Danny Lynch, Thibault Cayron, Dimitri Lederer, Aryan Afzalian, Chi-Woo Lee and J.P. Colinge
Comsol Conference, Grenoble, France, Oct. 2007
2."Doping Fluctuation Effects in Trigate SOI MOSFETs"
Ran Yan, Danny Lynch, Thibault Cayron, Dimitri Lederer, Aryan Afzalian, Chi-Woo Lee and J.P. Colinge
Proceedings EUROSOI 2008 Conference, pp. 65-66, 2008
3."ACCUMULATION-MODE AND INVERSION-MODE TRIPLE-GATE MOSFETS"
R. Yan, A. Afzalian, C.-W. Lee, N. Dehdashti Akhavan, W. Xiong and J.P. Colinge
Proceedings of China-Ireland International Conference on Information and Communication Technologies (CIICT 2008), pp.627-630, 2008
4.“LDD Depletion Effects in Thin-BOX FDSOI Devices with a Ground Plane”
R. Yan, R. Duane, P. Razavi, A. Afzalian, I. Ferain, C.W. Lee, N. Dehdashti-Akhavan, K. Bourdelle, B.Y. Nguyen, J.P. Colinge
Proceedings of the IEEE International SOI Conference, paper 4.04, 2009.
5.“3D Simulation of RTS Amplitude in Accumulation-Mode and Inversion-Mode Trigate SOI MOSFETs”
Ran Yan, Ailbhe Cullen, Aryan Afzalian, Isabelle Ferain, Chi-Woo Lee, Nima Dehdashti, Pedram Razavi and J.P. Colinge,
Proceedings EUROSOI Conference, pp. 89-90, 2010
6."Back-gate Mirror Doping for Fully Depleted Planar SOI Transistors with Thin Buried Oxide"
Ran Yan, Russell Duane, Pedram Razavi, Aryan Afzalian, Isabelle Ferain, Chi-Woo Lee, Nima Dehdashti, Bich-Yen Nguyen, Konstantin K. Bourdelle and J.P. Colinge
Proceedings of 2010 VLSI-TSA Symposium, T47, 2010
7."Performance analysis of SOI junctionless nanowire transistors"
R. Yan, A. Kranti, I. Ferain, C.W. Lee, R. Yu, N. Dehdashti, P. Razavi, J.P. Colinge
Book of Abatracts,10th Electron Technology Conference and 34th International Microelectronics and packaging Conference, p. 22, 2010
Others Publications:
1."Influence of Fluorine Implant on Threshold Voltage for Metal Gate FDSOI and MuGFET" W. Xiong, C.H. Hsu, C.R. Cleavelin, M. Ma, P. Patruno, C-W. Lee, R. Yan, D. Lederer, A. Afzalian, J.P. Colinge Proceedings IEEE International SOI Conference, pp. 35-36, 2007
2."A Quantum Definition of Threshold Voltage in MuGFETs" Se Re Na Yun, Chong Gun Yu, Jong-Tae Park, Chi-Woo Lee, D. Lederer, A. Afzalian, Ran Yan, J.P. Colinge Proceedings IEEE International SOI Conference, pp. 137-138, 2007
3."Simulation of fluorine implant effects in metal-gate FD-SOI and MuGFET" Chi-Woo Lee, D. Lederer, A. Afzalian, Ran Yan, J.P. Colinge Proceedings IEEK 2007 Summer Conference, Korea, pp. 2557-2558, 2007
4."Ultra Scaled MultiGate SOI MOSFETs: Accumulation-Mode vs. Inversion-Mode" Aryan Afzalian, Dimitri Lederer, Chi-Woo Lee, Ran Yan and Jean-Pierre Colinge Proceedings EUROSOI 2008 Conference, pp. 47-48, 2008
5."Influence of Carrier Confinement on the Subthreshold Swing of Multigate SOI MOSFETs" Jean-Pierre Colinge, Aryan Afzalian, Dimitri Lederer, Chi-Woo Lee and Ran Yan Proceedings EUROSOI 2008 Conference, pp. 61-62, 2008
6."MultiGate SOI MOSFETs: Accumulation-Mode vs. Enhancement-Mode" A. Afzalian, D. Lederer, C.-W Lee, R. Yan, W. Xiong, C.Rinn Cleavelin and J.-P. Colinge IEEE 2008 Silicon Nanoelectronics Workshop 2008
7.“Comparison of different surface orientation in narrow fin MuGFETs”, Chi-Woo Lee, A. Afzalian, Ran Yan, Nima Dehdashti, J.P. Colinge, Weize Xiong, Abstracts of the 14th International Symposium on the Physics of Semiconductors and Applications (ISPSA), Jeju, Korea, p. 282 (2008)
8."Ultra-scaled Z-RAM cell" S. Okhonin, M. Nagoga, C.-W. Lee, J.-P. Colinge, A. Afzalian, R. Yan, N. Dehdashti Akhavan, W. Xiong, V. Sverdlov, S. Selberherr, C. Mazure Proceedings IEEE International SOI Conference, pp. 157-158, 2008
9."Influence of Gate Underlap in AM and IM MuGFETs" Chi-Woo Lee, Aryan Afzalian, Ran Yan, Nima Dehdashti, Weize Xiong, Jean-Pierre Colinge 38th European Solid-State Device Research Conference & 34th European Solid-State Circuits Conference, 2008
10."Influence of carrier confinement on the subthreshold swing of multigate silicon-on-insulator transistors" Jean-Pierre Colinge, Aryan Afzalian, Chi-Woo Lee, Ran Yan, and Nima Dehdashti Akhavan APPLIED PHYSICS LETTERS, Vol.92, 133511, 2008
11."Drain Breakdown Voltage in MuGFETs: Influence of Physical Parameters" Chi-Woo Lee, Aryan Afzalian, Ran Yan, Nima Dehdashti Akhavan, Weize Xiong and Jean-Pierre Colinge IEEE TRANSACTIONS ON ELECTRON DEVICES, pp. 3503-3506 VOL. 55, NO. 12, DECEMBER 2008
12."Comparison of contact resistance between accumulation-mode and inversion-mode multigate FETs" Chi-Woo Lee, Dimitri Lederer, Aryan Afzalian, Ran Yan, Nima Dehdashti, Weize Xiong, Jean-Pierre Colinge Solid-State Electronics 52 pp. 1815–1820, 2008
13."Junctionless multigate field-effect transistor" Chi-Woo Lee, Aryan Afzalian, Nima Dehdashti Akhavan, Ran Yan, Isabelle Ferain, and Jean-Pierre Colinge APPLIED PHYSICS LETTERS 94, 053511 2009
14."Properties of Accumulation-Mode Multi-Gate Field-Effect Transistors" Jean-Pierre Colinge, Dimitri Lederer, Aryan Afzalian, Ran Yan, Chi-Woo Lee, Nima Dehdashti Akhavan, and Weize Xiong Japanese Journal of Applied Physics, pp. 034502/1-7, 2009
15.“Three-Dimensional NEGF Simulations of constriction tunnel barrier Silicon Nanowire MUGFETs” Aryan Afzalian, Chi-Woo Lee, Ran Yan, Nima Dehdashti Akhavan, Cindy Colinge and Jean-Pierre Colinge Silicon-on-Insulator Technology and Devices 14, ECS Transactions vol.19, no.4, pp.229-234
16.“Quantization effect in Capacitance Behavior of Nanoscale Si MuGFETs” Aryan Afzalian, Chi-Woo Lee, Ran Yan, Nima Dehdashti Akhavan, Cindy Colinge and Jean-Pierre Colinge Silicon-on-Insulator Technology and Devices 14, ECS Transactions vol.19, no.4, pp.321-326
17.“Analytical model for the high-temperature behaviour of the subthreshold slope in MuGFETs” Chi-Woo Lee, Dimitri Lederer, Aryan Afzalian, Ran Yan, Nima Dehdashti Akhavan, Jean-Pierre Colinge Microelectronic Engineering , Vol.86 Issue:10 Pages: 2067-2071, 2009
18.“Influence of Gate Misalignment on the Electrical Characteristics of MuGFETs”, Chi-Woo Lee, Aryan Afzalian, Ran Yan, Nima Dehdashti, Weize Xiong and Jean-Pierre Colinge, Proc. Technical Program, International Symposium on VLSI Technology – Systems and applications (VLSI-TSA), Hsinchu, Taiwan, pp. 125-126, 2009
19.“NBTI and hot-carrier effects in accumulation-mode Pi-gate pMOSFETs” Chi-Woo Lee, Isabelle Ferain, Aryan Afzalian, Ran Yan, Nima Dehdashti, Pedram Razavi, J.P. Colinge, Jong-tae Park Microelectronics Reliability 49 (9-11), pp.1044-1047 (2009), presented at the 20th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, OCT 05-09, 2009 Arcachon, FRANCE
20.“Comparison of different surface orientation in narrow fin MuGFETs” Chi-Woo Lee, Aryan Afzalian, Isabelle Ferain, Ran Yan, Nima Dehdashti, Ki-Yeol Byun, Cynthia Colinge, Weize Xiong, Jean-Pierre Colinge Microelectronic Engineering, Vol. 86, pp.2381–2384, 2009
21."Junctionless MuGFETs" Chi-Woo Lee, Aryan Afzalian, Ran Yan, Nima Dehdashti, J. P. Colinge Proceedings EUROSOI Conference, pp. 21-22, 2009
22."3D simulation of Nanowire by Full-Real Space NEGF Simulator" Nima Dehdashti, Aryan Afzalian, Chi-Woo Lee, Ran Yan, Giorgos Fagas and Jean-Pierre Colinge Proceedings EUROSOI Conference, pp. 61-62, 2009
23."Quantization effects in capacitance behaviour of nanoscale Si MuGFETs" A. Afzalian, C.-W. Lee, R. Yan, N. Dehdashti, I. Ferain, J.-P. Colinge Proceedings EUROSOI Conference, pp. 133-134, 2009
24.“Device characteristics of Trigate-FET with barrier constrictions in the channel” Nima Dehdashti, A. Afzalian, C.-W Lee, R. Yan, G. Fagas, J.-P Colinge Proceedings of 13th International Workshop on Computational Electronics (IWCE 2009), pp. 246-249, 2009
25.“A new F(ast)-CMS NEGF algorithm for efficient 3D simulations of switching characteristics enhancement in constricted tunnel barrier silicon nanowire MuGFETs”, Aryan Afzalian, Nima Dehdashti Akhavan, Chi-Woo Lee, Ran Yan, Isabelle Ferain, Pedram Razavi, Jean-Pierre Colinge, Journal of Computational Electronics, Volume 8, Numbers 3-4, pp. 287-306, 2009, DOI 10.1007/s10825-009-0283-1
26.“Hot carrier (HC) and Bias-Temperature-Instability (BTI) degradation of MuGFETs on silicon oxide and silicon nitride buried layers”, C.-W. Lee, I. Ferain, A. Afzalian, K.-Y. Byun, R. Yan, N. Dehdashti, P. Razavi, W. Xiong, J.P. Colinge, C. A. Colinge, and D. E. Ioannou, Proceedings of ESSDERC, pp. 261-264, 2009
27.“A new F(ast)-CMS Algorithm for Efficient Three-Dimensional NEGF Simulations of Arbitrary Shaped Silicon Nanowire MUGFETs” A. Afzalian, C.-W. Lee, N. Dehdashti Akhavan, R. Yan, I. Ferain, P. Razavi and J.-P. Colinge Proceedings of International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), pp. 237-240, 2009
28.“Variable-Barrier Tunneling SOI Transistor (VBT)” A. Afzalian, N. Dehdashti, I. Ferain, C.W. Lee, R. Yan, P. Razavi, J.P Colinge Proceedings of the IEEE International SOI Conference, paper 10.4, 2009.
29.“SOI Gated Resistor: CMOS without Junctions” J.P. Colinge, C.W. Lee, A. Afzalian, N. Dehdashti, R. Yan, I. Ferain, P. Razavi, B. O’Neill, A. Blake, M. White, A.M. Kelleher, B. McCarthy and R. Murphy Proceedings of the IEEE International SOI Conference, paper 11.1, 2009.
30.“Substrate bias effects in MuGFETs” C.W. Lee, A. Borne, I. Ferain, A. Afzalian, R. Yan, N. Dehdashti-Akhavan, P. Razavi, J.P. Colinge Proceedings EUROSOI Conference, pp. 47-48, 2010
31.“Junctionless Multiple Gate Transistors Performance for Analog Applications” R.T. Doria, M.A. Pavanello, C.W. Lee, I. Ferain, N. Dehdashti Akhavan, R. Yan, P. Razavi, R. Yu, J. P. Colinge Proceedings EUROSOI Conference, pp. 79-80, 2010
32.“Electric Field in Junctionless MuGFETs” J.P. Colinge, C.W. Lee, I. Ferain, N. Dehdashti Akhavan, R. Yan, P. Razavi, R. Yu, A.N. Nazarov, R.T. Doria Proceedings EUROSOI Conference, pp. 133-134, 2010
33.“Comparison of Breakdown Voltage in Bulk and SOI FinFETs” P. Razavi, R. Duane, R. Yan, I. Ferain, N. Dehdashti Akhavan, R. Yu, C.W. Lee, J.P. Colinge Proceedings EUROSOI Conference, pp.135-136 , 2010
34.“Effect of intravalley acoustic phonon scattering on mobility in silicon nanowire transistor” N. Dehdashti, A. Afzalian, C.-W. Lee, R. Yan, I. Ferain, P. Razavi, J.P. Colinge Proceedings EUROSOI Conference, pp. 53-54, 2010
35.“Performance estimation of junctionless multigate transistors” C.W. Lee, I. Ferain, A. Afzalian, R. Yan, N. Dehdashti Akhavan, P. Razavi, J.P. Colinge Solid-State Electronics, Vol. 54, pp. 97-103, 2010
36.“Influence of gate misalignment on the electrical characteristics of MuGFETs” Chi-Woo Lee, Aryan Afzalian, Isabelle Ferain, Ran Yan, Nima Dehdashti Akhavan, Weize Xiong, Jean-Pierre Colinge Solid-State Electronics, Vol. 54, pp. 226–230, 2010
37.“Reduced electric field in junctionless transistors”, Jean-Pierre Colinge, Chi-Woo Lee, Isabelle Ferain, Nima Dehdashti Akhavan, Ran Yan, Pedram Razavi, Ran Yu, Alexei N. Nazarov, Rodrigo T. Doria, Applied Physics Letters, Vol. 96, p. 073510, 2010
38.“High-Temperature Performance of Silicon Junctionless MOSFETs”, Chi-Woo Lee, Adrien Borne, Isabelle Ferain, Aryan Afzalian, Ran Yan, Nima Dehdashti, J.P. Colinge, IEEE Transaction on Electron Devices vol.57, no.03, pp.620-625, 2010
39.“Quantum Confinement Effects in Capacitance Behavior of Multigate Silicon Nanowire MOSFETs”, A. Afzalian, C.W. Lee, N. Dehdashti-Akhavan, R. Yan, I. Ferain and J.P. Colinge, IEEE Transactions on Nanotechnology, DOI 10.1109/TNANO.2009.2039800
40.“Low subthreshold slope in junctionless multigate transistors” C.-W. Lee, A. N. Nazarov, I. Ferain, N. Dehdashti, R. Yan, P. Razavi, R. Yu, Rodrigo T. Doria, J.P. Colinge, Applied Physics Letters Vol. 96, p. 102106, 2010
41.“Simulation of Quantum Current Oscillations in Trigate SOI MOSFETs”, Nima Dehdashti Akhavan, Aryan Afzalian, Chi-Woo Lee, Ran Yan, Isabelle Ferain, Pedram Razavi, Giorgos Fagas, Jean-Pierre Colinge, IEEE Transactions on Electron Devices, Vol. 57, no 5, pp. 1102-1109, 2010
42.“Low Temperature Behavior of Junctionless Multiple Gate nMOSFETs”, M. de Souza, M. A. Pavanello, C. W. Lee , R.T. Doria, I. Ferain, R. Yan, R. Yu, N. Dehdashti-Akhavan, P. Razavi and J. P. Colinge, Proceedings of WOLTE 9 - Ninth international Workshop on Low Temperature Electronics, pp.27-29, 2010
43.“Mobility Improvement in Nanowire Junctionless Transistors by Uniaxial Strain”, Jean-Pierre Raskin, Jean-Pierre Colinge, Isabelle Ferain, Abhinav Kranti, Chi-Woo Lee, Nima Dehdashti Akhavan, Ran Yan, Pedram Razavi, Ran Yu, Applied Physics Letters, Vol. 97, 042114, 2010
44.“Effect of intravalley acoustic phonon scattering on quantum transport in multigate silicon nanowire metal-oxide-semiconductor field-effect transistors”, Nima Dehdashti Akhavan, Aryan Afzalian, Chi-Woo Lee, Ran Yan, Isabelle Ferain, Pedram Razavi, Ran Yu, Giorgos Fagas, and Jean-Pierre Colinge Journal of Applied Physics, 108, 034510, 2010
45.“Nanowire Zero-Capacitor DRAM Transistors With and Without Junctions”, Chi-Woo Lee, Ran Yan, Isabelle Ferain, Abhinav Kranti, Nima Dehdashti Akhavan, Pedram Razavi, Ran Yu, J.P. Colinge, Proceedings of IEEE Nano 2010, paper ICP_TS01_001, 2010 Best Student Paper Award
46.“Junctionless Nanowire Transistor (JNT): Properties and Design Guidelines”, A. Kranti, R. Yan, C.-W. Lee, I. Ferain, R. Yu, N. Dehdashti Akhavan, P. Razavi, JP Colinge, Proceedings ESSDERC, pp. 357-360, 2010
47.“Dissipative Transport in Multigate Silicon nanowire Transistors”, Nima Dehdashti, Abhinav Kranti, Isabelle Ferain, Chi-Woo Lee, Ran Yan, Pedram Razavi, Ran Yu, Jean-Pierre Colinge, Proceedings of SISPAD, pp. 97-100, 2010
48.“Short-Channel Junctionless Nanowire Transistors”, C.W. Lee, I. Ferain, A. Kranti, N. Dehdashti Akhavan, P. Razavi, R. Yan, R. Yu, B. O’Neill, A. Blake, M. White, A.M. Kelleher, B. McCarthy, S. Gheorghe, R. Murphy, J.P. Colinge, Solid-State Devices and Materials Conference (SSDM), paper C-9-5L, 2010
49.“Characterization of junctionless Z-RAM cell”, C.-W. Lee, S.Okhonin, M. Nagoga, A. Kranti, I. Ferain, N. Dehdashti Akhavan, P. Razavi, R. Yu, R. Yan, J.P. Colinge, Solid-State Devices and Materials Conference (SSDM), paper E-1-2, 2010
50.“Analysis of the Junctionless Transistor Architecture”, Jean-Pierre Colinge, Jean-Pierre Raskin, Abhinav Kranti, Isabelle Ferain, Chi-Woo Lee, Nima Dehdashti Akhavan, Pedram Razavi, Ran Yan and Ran Yu, Solid-State Devices and Materials Conference (SSDM), paper C-9-4, 2010
51.“Analog Operation and Harmonic Distortion Temperature Dependence of nMOS Junctionless Transistors”, Rodrigo T. Doria, Marcelo A. Pavanello, Chi-Woo Lee, Isabelle Ferain, Nima Dehdashti-Akhavan, Ran Yan, Pedram Razavi, Ran Yu, Abhinav Kranti, Jean-Pierre Colinge, ECS Transactions Vol. 31(1), The Electrochemical Society , pp. 13-20 (2010)
52.“Analog Operation of Junctionless Transistors at Cryogenic Temperatures”, R.T. Doria, M.A. Pavanello, R.D. Trevisoli, M. de Souza, C.W. Lee, I. Ferain, N. Dehdashti Akhavan, R. Yan, P. Razavi, R. Yu, A. Kranti, and J.P. Colinge, Proceedings IEEE International SOI Conference, pp. 72-73 (2010)
53.“Mobility Improvement in Nanowire Junctionless Transistors by Uniaxial Strain”, J.-P. Raskin, J.-P. Colinge, I. Ferain, A. Kranti, C.-W. Lee, N. Dehdashti, R. Yan, P. Razavi, R. Yu, Proceedings IEEE International SOI Conference, pp. 78-79 (2010)
54.“Emission and absorption of optical phonons in multigate silicon nanowire MOSFETs”, N. Dehdashti, A. Kranti, I. Ferain, C.W. Lee, R. Yan, P. Razavi, R. Yu and J.P. Colinge, 14th International Workshop on Computational Electronics (IWCE), pp. 351-354 (2010)
55.“Junctionless transistors: physics and properties”, JP Colinge, CW Lee, N. Dehdashti Akhavan, R. Yan, I. Ferain, P. Razavi, A. Kranti, R. Yu, Abstracts of 6th International SemOI Workshop on Nanoscaled Semiconductor-on-Insulator Materials, Sensors an Devices, pp. 65-66 (2010) Invited Paper
56.“Junctionless 6T SRAM cell”, A. Kranti, C.W. Lee, I. Ferain, R. Yan, N. Akhavan, P. Razavi, R. Yu, G.A. Armstrong, J.P. Colinge, Electronics Letters, Vol. 46, No. 22, pp.1491–1493 (2010)
57.“Comparison of the switching speed in junctionless and accumolation-mode gate-all-around nanowire transistors”, P. Razavi, R. Yan, I. Ferain, N. Dehdashti Akhavan, R. Yu, J.P. Colinge, Proceedings of EUROSOI 2011, VII Workshop of the Thematic Network on Silicon On Insulator Technology, Devices and Circuits, pp. 43-44 (2011)
58.“Extraction of flat-band voltage and parasitic resistance in junctionless MuGFETs”, A.N. Nazarov, C.W. Lee, A. Kranti, I. Ferain, R. Yan, N. Dehdashti Akhavan, P. Razavi, R. Yu, JP Colinge, Proceedings of EUROSOI 2011, VII Workshop of the Thematic Network on Silicon On Insulator Technology, Devices and Circuits, pp. 53-54 (2011)
59.“Analytical Model for the Threshold Voltage of Junctionless Nanowire Transistors", R. D. Trevisoli, M. A. Pavanello, R. T. Doria, M. de Souza, C.W. Lee, I. Ferain, N. Dehdashti Akhavan, R. Yan, P. Razavi, R. Yu, A. Kranti and J.P. Colinge, Proceedings of EUROSOI 2011, VII Workshop of the Thematic Network on Silicon On Insulator Technology, Devices and Circuits, pp. 67-68 (2011)
60.“Influence of single-atom impurity scattering on quantum transport in silicon nanowire transistors”, N. Dehdashti Akhavan, I. Ferain, R. Yan, P. Razavi, R. Yu and J.P Colinge, Proceedings of EUROSOI 2011, VII Workshop of the Thematic Network on Silicon On Insulator Technology, Devices and Circuits, pp. 79-80 (2011)
61.“Nanowire to Single-Electron Transistor Transition in Trigate SOI MOSFETs”, Nima Dehdashti Akhavan, Aryan Afzalian, Chi-Woo Lee, Ran Yan, Isabelle Ferain, Pedram Razavi, Ran Yu, Giorgos Fagas, and Jean-Pierre Colinge, IEEE Transactions on Electron Devices, Vol. 58, no. 1, pp. 26-32 (2011)
62."High-Temperature Performance of Silicon Junctionless MOSFETs", Chi-Woo Lee, Adrien Borne, Isabelle Ferain, Aryan Afzalian, Ran Yan, Nima Dehdashti Akhavan, Pedram Razavi, and Jean-Pierre Colinge, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 57, NO. 3, MARCH 2010
63."Extraction of Channel Mobility in Nanowire MOSFETs Using Id(Vg) Characteristics and Random Telegraph Noise Amplitude", A.N. Nazarov, C.W. Lee, A. Kranti, I. Ferain, R. Yan, N. Dehdashti Akhavan, P. Razavi, R. Yu, J.-P. Colinge, Proceedings of 2011 12th International Conference on Ultimate Integration on Silicon (ULIS), pp. 107-109 (2011)
64."The Roles of the Electric Field and the Density of Carriers in the Improved Output Conductance of Junctionless Nanowire Transistors", R.T. Doria, M.A. Pavanello, R.D. Trevisoli, M. Souza, C.W. Lee, I. Ferain, N. Dehdashti Akhavan, R. Yan, P. Razavi, R. Yu, A. Kranti, J.P. Colinge, ESC Transactions, Advanced Semiconductor-on-Insulator Technology and Related Physics 15, vol. 35, no.5, pp. 286-288 (2011)
65."Comparative Study of Random Telegraph Noise in Junctionless and Inversion-mode MuGFETs", A.N. Nazarov, C.W. Lee, A. Kranti, I. Ferain, R. Yan, N. Dehdashti Akhavan, P. Razavi, R. Yu, J.-P. Colinge, ESC Transactions, Advanced Semiconductor-on-Insulator Technology and Related Physics 15, vol. 35, no.5, pp. 73-78 (2011)
66."A Simulation Comparison between Junctionless and Inversion-Mode MuGEFTs", J.P. Colinge, A. Kranti, R. Yan, I. Ferain, N. Dehdashti Akhavan, P. Razavi, C.W. Lee, R. Yu, C.A. Colinge, ESC Transactions, Advanced Semiconductor-on-Insulator Technology and Related Physics 15, vol. 35, no.5, pp. 63-72 (2011)
67.“Quantum Confinement Effects in Capacitance Behavior of Multigate Silicon Nanowire MOSFETs”, A. Afzalian, C.W. Lee, N. Dehdashti-Akhavan, R. Yan, I. Ferain and J.P. Colinge, IEEE Transactions on Nanotechnology, Vol. 10, No. 2, pp. 300-309 (2011) DOI 10.1109/TNANO.2009.2039800
68.“Junctionless Multiple-Gate Transistors for Analog Applications”, Rodrigo Trevisoli Doria, Marcelo Antonio Pavanello, Renan Doria Trevisoli, Michelly de Souza, Chi-Woo Lee, Isabelle Ferain, Nima Dehdashti Akhavan, Ran Yan, Pedram Razavi, Ran Yu, Abhinav Kranti, and Jean-Pierre Colinge, IEEE Transactions on Electron Devices, Vol. 58, No. 8, pp. 2511-2519 (2011)
69.“Junctionless Nanowire Transistor (JNT): Properties and design guidelines”, J.P. Colinge, A. Kranti, R. Yan, C.W. Lee, I. Ferain, R. Yu, N. Dehdashti Akhavan, P. Razavi, Solid-State Electronics, Solid-State Electronics, Vol. 65–66, pp. 33–37 (2011)
70.“Analog operation temperature dependence of nMOS junctionless transistors focusing on harmonic distortion”, Rodrigo T Doria, Marcelo A Pavanello, Renan D Trevisoli, Michelly de Souza, Chi-Woo Lee, Isabelle Ferain, N Akhavan, Ran Yan, Pedram Razavi, Ran Yu, Abhinav Kranti, Jean-Pierre Colinge, Journal of Integrated Circuits and Systems, Vol. 6, pp. 114–121 (2011/5)
71.“Advanced gate stack work function optimization and substrate dependent strain interactions on HKMG first stacks for 28nm VLSI ultra low power technologies”, Hoentschel, J.; Shiang Yang Ong; Balzer, T.; Sassiat, N.; Ran Yan; Herrmann, T.; Flachowsky, S.; Grass, C.; Beyer, S.; Kallensee, O.; Yu-Yin Lin; Shickova, A.; Muehlhoff, A.; Kretzschmar, C.; Winkler, J.; Wiatr, M.; Horstmann, M., 14th International Conference on Ultimate Integration on Silicon (ULIS), pp. 37–40 (2013)