Science Citation Indexed Journal Publications

  1. Sachdeva, Ashish, and V. K. Tomar. “A Carbon Nano-Tube Field Effect Transistor Based Stable, Low-Power 8T Static random Access Memory Cell with Improved Write Access Time ” International Journal of Electronics and Communications (2023) (SCI, Scopus) (IF: 3.183)

  2. Sachdeva, Ashish, and V. K. Tomar. “Design of a Stable Single Sided 11T Static Random Access Memory cell with Improved Critical Charge” Journal of Numerical Modelling: Electronic Networks, Devices and Fields (2022) (SCI, Scopus) (IF: 1.436)

  3. Sachdeva, Ashish, and V. K. Tomar. “Low Power Static Random-Access Memory Cell Design for Mobile Opportunistic Networks Sensor Nodes” Journal of circuits, Systems and Computers (2022) (SCI, Scopus) (IF: 1.278) https://doi.org/10.1142/S0218126623500780

  4. V. K. Tomar and Sachdeva, Ashish. “Design of a Soft Error Hardened SRAM Cell with Improved Access Time for Embedded Systems” Microprocessors and Microsystems (2021) (SCI, Scopus) (IF: 1.525) https://doi.org/10.1016/j.micpro.2022.104445

  5. Sachdeva, Ashish, and V. K. Tomar. "Characterization of stable 12T SRAM with improved critical charge " Journal of circuits, Systems and Computers (2021): 2050206. (SCI, Scopus) (IF: 1.333) https://doi.org/10.1142/S0218126622500232

  6. Sachdeva, Ashish, and V. K. Tomar. "A Soft-Error Resilient Low Power Static Random Access Memory Cell " Analog Integrated Circuits and Signal Processing (2021) (SCI, Scopus) (IF: 1.337) 10.1007/s10470-021-01898-9

  7. Sachdeva, Ashish, and V. K. Tomar. "A Multi-bit Error Upset Immune 12T SRAM Cell for 5G Satellite Communications" Wireless Personal Communications (2021) (SCIE, Scopus) (IF: 1.671) https://doi.org/10.1007/s11277-021-08462-8

  8. Sachdeva, Ashish, and V. K. Tomar. "Design of multi-cell upset immune single-end SRAM for low power applications" International Journal of Electronics and Communications (2020) (SCI, Scopus) (IF: 3.183) https://doi.org/10.1016/j.aeue.2020.153516

  9. Sachdeva, Ashish, and V. K. Tomar. "A Schmitt-Trigger Based Low Read Power 12-T SRAM Cell" Analog Integrated Circuits and Signal Processing (2020) (SCI, Scopus) (IF: 1.337) https://doi.org/10.1007/s10470-020-01718-6

  10. Sachdeva, Ashish, and V. K. Tomar. "Design of 10T SRAM Cell with Improved Read performance and Expanded Write Margin" IET Circuit Devices and Systems (2020) (SCI, Scopus) (IF: 1.297) https://doi.org/10.1049/cds2.12006

  11. Sachdeva, Ashish, and V. K. Tomar. " Design of Low Power Half Select Free 10-T Static Random Access Memory cell" Journal of circuits, Systems and Computers (2020) (SCI, Scopus) (IF: 1.333) https://doi.org/10.1142/S0218126621500730

  12. Sachdeva, Ashish, and V. K. Tomar. "Design of a Stable Low Power 11-T Static Random Access Memory Cell." Journal of circuits, Systems and Computers (2020): 2050206. (SCI, Scopus) (IF: 1.333) https://doi.org/10.1142/S0218126620502060