C1. H. Singh, C. Jain, K. Sharma and Ashish Sachdeva. " A Low-Leakage SRAM Cell With Improved Access Time for Communication Devices" IEEE Third International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES) IEEE(Accepted) (Scopus)
C2. D. Yadav, K. Sharma and Ashish Sachdeva. " Characterization of a 45nm Low-Power Nine Transistors Feedback-Cutting SRAM Cell" IEEE Third International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES) IEEE(Accepted) (Scopus)
C3. A. Sharma, V. Kahol and Ashish Sachdeva. " Design of a Power-Efficient Static Random Access Memory Cell With Enhanced Stability for Internet of Things Applications " IEEE International Conference on Communication Systems and Network Technologies (CSNT 2024). IEEE, 2024. (Accepted and Presented) (Scopus)
C4. Sachdeva, A. (2023, May). Carbon Nano-Tube based Field Effect Transistor Optimization for Low power Internet of Things Devices. In 2023 IEEE Renewable Energy and Sustainable E-Mobility Conference (RESEM) (pp. 1-6). IEEE. (Scopus)
C5. S Bhavani, L Gupta, A Sachdeva, T Sharma. " Optimization of the aspect ratio to enhance the power and noise-margin of a standard 6T (S6T)-SRAM cell" 2022 Fourth International Conference on Emerging Research in Electronics, Computer Science and Technology (ICERECT). IEEE, 2022. (Scopus)
C6. Sachdeva, Ashish, and V. K. Tomar. "Noise margin enhancement of Conventional 6T SRAM Cell by aspect Ratio Optimization" 10th IEEE International Conference on Communication Systems and Network Technologies (CSNT 2021). IEEE, 2021. (Scopus)
C7. Sachdeva, Ashish, and V. K. Tomar. " Stability and Dynamic Power Analysis of Novel 9T SRAM Cell for IoT Applications." International Conference on Communication and Intelligent Systems (ICCIS 2020). (Scopus)
C8. Sachdeva, Ashish, and V. K. Tomar. "Statistical Stability Characterization of Schmitt Trigger Based 10-T SRAM Cell Design." 2020 7th International Conference on Signal Processing and Integrated Networks (SPIN). IEEE, 2020. (Scopus)
C9. Tomar, V. K., and Ashish Sachdeva. "Implementation and analysis of power reduction techniques in charge transfer sense amplifier for sub 90nm SRAM." 2017 8th International Conference on Computing, Communication and Networking Technologies (ICCCNT). IEEE, 2017. (Scopus)
C10. Sachdeva, Ashish, and V. K. Tomar. "Investigations of various SRAM cell structures for leakage energy reduction." 2016 2nd International Conference on Communication Control and Intelligent Systems (CCIS). IEEE, 2016. (Scopus)
C11. Pahuja, G. L., Kriti Kaushik, and Ashish Sachdeva. "SAT reliability evaluation of directed networks using disjointing technique." 2015 1st International Conference on Next Generation Computing Technologies (NGCT). IEEE, 2015. (Scopus)
C12. Rajora, R., Sharma, K., Gupta, L., & Sachdeva, A. (2023, April). CNTFET-based design of low power charge pump technique-based voltage multiplier. In 2023 IEEE Devices for Integrated Circuit (DevIC) (pp. 442-445). IEEE. (Scopus)
C13. Rana, G., Sharma, K., Sharma, A., Gupta, L., & Sachdeva, A. (2023, April). Comparative Analysis of EEPL and PPL Techniques in 18nm FinFET Technology. In 2023 IEEE Devices for Integrated Circuit (DevIC) (pp. 30-33). IEEE. (Scopus)
C14. Kumar, R. R., Sharma, K., Sachdeva, A., & Gupta, L. (2023, April). Design and Simulation of Cascode Current reuse low power Operational transconductance amplifier. In 2023 IEEE Devices for Integrated Circuit (DevIC) (pp. 34-37). IEEE. (Scopus)
C15. Rajora, R., Sharma, K., Gupta, L., Sachdeva, A., & Sharma, A. (2023, March). Low-Power High-Speed CNTFET-based 1-bit Comparator Design using CCT and STT Techniques. In 2023 Second International Conference on Electronics and Renewable Systems (ICEARS) (pp. 49-53). IEEE. (Scopus)