DIOPSIS 740 and DIOPSIS 940 MPSoC

While serving as CTO of the ATMEL Roma design center, Pier Stanislao PAOLUCCI has been the chief architect of two generations of the DIOPSIS MPSoC architecture.

 The first generation, named DIOPSIS 740, combined the first version, named mAgic, of the VLIW Floating point DSP architecture designed by ATMEL Roma, with an ARM7TDMI and a rich set of peripherals. 

Herebelow, the layout of the chip (2003)

The second generation, named DIOPSIS 940, combined the mAgicV natively C-programmable floating-point VLIW DSP, with ARM926 and peripherals. 

Here below a board, mounting the DIOPSIs 940 Multiprocessor-System-on-Chip

The first presentation of Diopsis 740, taped-out by ATMEL Roma in 2003, has been presented at the

• Hot Chips 15 Conference, Stanford, (2003) , see Diopsis/Janus presentation: Janus: a Gigaflop RISC + VLIW SoC Tile. Note: Diopsis 740 has been later in the commercial name of Janus.