Research

Group IV-Based Materials Novel MOSFET/TFET GAA NW Transistors

1. Ge(Sn)-based vertical gate-all-around nanowire CMOS

We demonstrate for the first time, vertical GeSn/Ge and Ge gate-all-around nanowire pMOSFETs fabricated with a CMOS compatible top-down approach. Vertical Ge nanowires with 20 nm diameters and smooth sidewalls were achieved with optimized ICP-RIE and digital etching. Employing a GAA architecture, post-oxidation passivation and NiGe contacts, high-performance Ge nanowire pMOSFETs exhibit low SS of 66 mV/dec, small DIBL of 35 mV/V, and a high ION/IOFF ratio of 3E6. Further performance improvements, like ION, DIBL were achieved by adopting GeSn as the source. ~ 32% ION enhancement for vertical GeSn/Ge nanowire pFET is obtained compared with Ge control device. This is attributed to a smaller NiGeSn/GeSn contact resistivity and the existence of a valence band offset at the GeSn/Ge heterojunction. With further EOT scaling, GeSn/Ge pFET also achieves the highest Gm,ext of ~ 870 uS/um and record high Q = Gm/SS of 9.1 for all reported GeSn-based pMOSFETs. (Details)

2. GeSn-based planar MOSFET

We demonstrate high performance undoped Ge0.92Sn0.08 quantum well (QW) pMOSFETs with in situ Si2H6 passivation on (001), (011) and (111) orientations. (011) and (111)-oriented Ge0.92Sn0.08 QW pFETs achieve higher on-state current ION and effective hole mobility μeff compared to (001) devices. Ge0.92Sn0.08 (111) QW pFETs demonstrate a record high μeff of 845 cm2V-1s-1 for GeSn p-channel devices. This is enabled by incorporating high biaxial compressive strain (1.43%) and eliminating dopant impurity scattering in the defect-free GeSn channel.(Details)

3. GeSn-based Tunneling FET

We fabricated relaxed Ge0.97Sn0.03 pTFETs on Si(001). The devices show much higher ION than SiGe, Ge, and compressively strained GeSn planer pTFETs in literatures. For the first time, ION enhancement in GeSn pTFET utilizing uniaxial strain is reported. By applying 0.14% uniaxial tensile strain along channel direction, Ge0.97Sn0.03 [110] pTFETs achieve ~ 10% ION improvement, over relaxed devices at |VGS - VTH| = |VDS| = 1.0 V. Calculation demonstrates that the reduction of direct EG by tensile strain results in an enhanced GBTBT in GeSn, leading to improvement of ION in uniaxially tensile strained pTFET. (Details)

4. TCAD Simulation

GeSn-based TFET

We design a heterojunction-enhanced n-channel TFET (HE-NTFET) employing a Ge1-xSnx/Ge1-ySny (x>y) hetero-junction located in channel region with a distance of LT-H from the source-channel tunneling junction (TJ). We investigate the impact of LT-H on the performance of HE-NTFETs by simulation. HE-NTFETs achieve a positive shift of VONSET, a steeper SS and an enhanced ION compared to homo-NTFET, which is attributed to the modulating effect of heterojunction on BTBT. At a supply voltage of 0.3 V, 304% ION enhancement is demonstrated in Ge0.92Sn0.08 /Ge0.94Sn0.06 HE-NTFET with a 4 nm LT-H over Ge0.92Sn0.08 homo-NTFET due to the steeper average SS. The impact of Sn composition on the performance of HE-NTFETs is also studied. As we increase the difference in Sn composition x-y across the heterojunction, ION and SS of HE-NTFETs are improved due to the increase of band offsets at Ge1-xSnx/Ge1-ySny interface, which leads to the enhanced modulating effect of hetero-junction on BTBT.(Details)