dev/mem.c

10500 # 10501 /* 10502 */ 10503 10504 /* 10505 * Memory special file 10506 * minor device 0 is physical memory 10507 * minor device 1 is kernel memory 10508 * minor device 2 is EOF/RATHOLE 10509 */ 10510 10511 #include "../h/param.h" 10512 #include "../h/dir.h" 10513 #include "../h/user.h" 10514 #include "../h/conf.h" 10515 #include "../h/seg.h" 10516 10517 mmread(dev) 10518 { 10519 register c, bn, on; 10520 int a, d; 10521 10522 if(minor(dev) == 2) 10523 return; 10524 do { 10525 bn = u.u_offset >> 6; 10526 on = u.u_offset & 077; 10527 a = UISA->r[0]; 10528 d = UISD->r[0]; 10529 spl7(); 10530 UISA->r[0] = bn; 10531 UISD->r[0] = 077406; 10532 if(minor(dev) == 1) 10533 UISA->r[0] = (ka6-6)->r[(bn>>7)&07] + (bn & 0177); 10534 if ((c = fuibyte((caddr_t)on)) < 0) 10535 u.u_error = ENXIO; 10536 UISA->r[0] = a; 10537 UISD->r[0] = d; 10538 spl0(); 10539 } while(u.u_error==0 && passc(c)>=0); 10540 } 10541 10542 mmwrite(dev) 10543 { 10544 register c, bn, on; 10545 int a, d; 10546 10547 if(minor(dev) == 2) { 10548 u.u_count = 0; 10549 return; 10550 } 10551 for(;;) { 10552 bn = u.u_offset >> 6; 10553 on = u.u_offset & 077; 10554 if ((c=cpass())<0 || u.u_error!=0) 10555 break; 10556 a = UISA->r[0]; 10557 d = UISD->r[0]; 10558 spl7(); 10559 UISA->r[0] = bn; 10560 UISD->r[0] = 077406; 10561 if(minor(dev) == 1) 10562 UISA->r[0] = (ka6-6)->r[(bn>>7)&07] + (bn & 0177); 10563 if (suibyte((caddr_t)on, c) < 0) 10564 u.u_error = ENXIO; 10565 UISA->r[0] = a; 10566 UISD->r[0] = d; 10567 spl0(); 10568 } 10569 } 10570 10571 10572 10573 10574 10575 10576 10577 10578 10579 10580 10581 10582 10583 10584 10585 10586 10587 10588 10589 10590 10591 10592 10593 10594 10595 10596 10597 10598 10599