Publications

- Book

1. Photonic Interconnects for Computing Systems ; Understanding and Pushing Design Challenges. Editors Mahdi Nikdast, Gabriela Nicolescu, Sébastien Le Beux and Jiang Xu. ISBN: 9788793519800. River Publishers. June 2017.

- Patent
  1. Sébastien Le Beux and Ian O’Connor. Réseau optique en anneau, intégré sur puce (ONoC) et procédé associé. FR1356028.
- Referred Journal Publications

- 1. Jiating Luo, Cédric Killian, Sébastien Le Beux, Daniel Chillet, Olivier Sentieys and Ian O’Connor. Offline optimization of wavelength allocation and laser power in nanophotonic interconnects. ACM Journal on Emerging Technologies in Computing Systems (JETC). To appear. 2018.
  2. Hui Li, Sébastien Le Beux, Martha Johanna Sepulveda, Ian O’Connor. Energy-Efficiency Comparison of Multi-Layer Deposited Nanophotonic Crossbar Interconnects. ACM Journal on Emerging Technologies in Computing Systems (JETC). 2017.
  3. Hui Li, Alain Fourmigue, Sébastien Le Beux, Ian O’Connor and Gabriela Nicolescu. Towards Maximum Energy Efficiency in Nanophotonic Interconnects with Thermal-Aware On-Chip Laser Tuning. IEEE Transactions on Emerging Topics in Computing, 2016.
  4. Luan H. K. Duong, Zhehui Wang, Mahdi Nikdast, Jiang Xu, Peng Yang, Zhifei Wang, Zhe Wang, Rafael Kioji Vivas Maeda, Haoran Li, Xuan Wang, Sébastien Le Beux, Yvain Thonnart, "Coherent and Incoherent Crosstalk Noise Analyses in Inter/Intra-chip Optical Interconnection Networks", IEEE Transactions on Very Large Scale Integration Systems, July, 2016.
  5. Nataliya Yakymets, Ian O’Connor, Kotb Jabeur and Sebastien Le Beux. Multi-Level Mapping of Nanocomputer Architectures Based on Hardware Reuse. IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), special issue on Computing in Emerging Technologies, 2014.
  6. Luan H.K. Duong, Mahdi Nikdast, Sébastien Le Beux, Jiang Xu, Xiaowen Wu, Zhehui Wang, Peng Yang. A Case Study of Signal-to-Noise Ratio in Ring-Based Optical Networks-on-Chip. In IEEE Design & Test special issue on Silicon Nanophotonics for Future Multicore Architectures, 2014.
  7. Sébastien Le Beux, Hui Li, Gabriela Nicolescu, Jelena Trajkovic and Ian O’Connor. Optical Crossbars on Chip, A Comparative Study based on Worst-Case Losses. In Wiley Concurrency and Computation: Practice and Experience (CCPE) special issue on Silicon Photonics, 2014.
  8. Kotb Jabeur, Ian O'Connor and Sébastien Le Beux. Ambipolar Independent Double Gate FET (Am-IDGFET) for the design of compact logic Structures. In IEEE Transactions on Nanotechnology, DOI 10.1109/TNANO.2014.2306071. 2014.
  9. Mèlèk Channoufi, Pierre Lecoy, Sébastien Le Beux, Delacressonnière Bruno, Rabah Attia. A novel multilayer micro-ring resonator based Optical Network on Chip. In Optoelectronics and Advanced Materials - Rapid Communications (OAM-RC) Vol 8, 3-4, pp 192-197, 2014.
  10. Sébastien Le Beux, Ian O’Connor, Gabriela Nicolescu, Guy Bois and Pierre Paulin. Reduction Methods for Adapting Optical Network on Chip Topologies to 3D Architectures, Microprocessors and Microsystems, Vol. 37, Issue 1, Pages 87–98, February 2013.
  11. M. Channoufi, P. Lecoy, S. Le Beux, R. Attia, B. Delacressonniere, A novel optical network on chip design for future generation of multiprocessors system on chip, IJACSA vol 4 n°3, 2013
  12. Abdoulaye Gamatié, Sébastien Le Beux, Éric Piel, Rabie Ben Atitallah, Anne Etien, Philippe Marquet and Jean-Luc Dekeyser. A Model Driven Design Framework for Massively Parallel Embedded Systems. In ACM Transactions on Embedded Computing Systems (TECS), Volume 10 Issue 4, November 2011.
  13. Sébastien Le Beux, Gabriela Nicolescu, Guy Bois, Youcef Bouchebaba, Michel Langevin and Pierre Paulin. Combining Mapping and Partitioning Exploration for NoC-Based Embedded Systems. In Journal of Systems Architecture, Special Issue on HW/SW Co-Design: Systems and Networks on Chip , Vol. 56, Issue 7, July 2010, Pages 223-232.
  14. Sébastien Le Beux, Jelena Trajkovic, Ian O’Connor, Gabriela Nicolescu, Guy Bois and Pierre Paulin. Multi-Optical Network on Chip for Large Scale MPSoC. In IEEE Embedded Systems Letters, Vol. 2, Issue 3, Pages 77 - 80, Sept. 2010.
  15. Sébastien Le Beux, Philippe Marquet and Jean-Luc Dekeyser. A Model Driven Co-Design Approach for High Performance Embedded Systems Dedicated to Transport. In international journal Studies in Informatics and Control (SIC), Vol. 17, Number 4, 2008.

- Book chapters

- 1. Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois and Pierre Paulin. System Level Exploration for Optical Interconnect Architectures. In book Integrated Optical Interconnect Architecures for Embedded Systems. Springer, 2012.
  2. Sébastien Le Beux, Laurent Moss, Philippe Marquet and Jean-Luc Dekeyser. A High Level Synthesis Flow Using Model Driven Engineering. In book Algorithm-Architecture Matching for Signal and Image Processing. Springer. 2010.
  3. Sébastien Le Beux, Philippe Marquet, Antoine Honoré and Jean-Luc Dekeyser. A Model Driven Engineering Design Flow to Generate VHDL. In International Workshop: ModEasy '07 Model Driven Design for Automotive Safety Embedded Systems (MODEASY). Sharker Verlag 2008, pp 15-20.

- Articles published in refereed international conference/workshop proceedings

- 1. Jiating Luo, Van-Dung Pham, Cédric Killian, Daniel Chillet, Ian O'Connor, Olivier Sentieys and Sébastien Le Beux. Run-Time management of energy-performance trade-off in Optical Network-on-Chip. In proceedings of Design of Circuits and Integrated Systems Conference (DCIS), 2018. Invited.
  2. An Qi, Sébastien Le Beux, Ian O’Connor and Jacques-Olivier Klein. Large Scale, High Density Integration of All Spin Logic. IEEE International Conference on Design Automation and Test in Europe (DATE), Dresden, March, 2018. Invited.
  3. Kevin Cheng, Sébastien Le Beux, Ian O’Connor. Hybrid Topologies for Reconfigurable Matrices Based on Nano-Grain Cells In proceedings of the IEEE International Conference on Rebooting Computing (ICRC), Washington, 2017.
  4. Zhen Li, Christelle Monat, Sébastien Le Beux, Xavier Letartre, Ian O’Connor. An Energy-Efficient Reconfigurable Nanophotonic Computing Architecture Design: Optical Lookup Table. In proceedings of the IEEE International Conference on Rebooting Computing (ICRC), Washington, 2017.
  5. Qi AN, Sébastien Le Beux, Ian O’Connor, Jacques Olivier Klein and Weisheng Zhao. Arithmetic Logic Unit based on All-Spin Logic Devices. In proceedings of the 15th IEEE International NEWCAS Conference. Strasbourg, France, June, 2017
  6. Cédric Killian, Daniel Chillet, Sébastien Le Beux, Olivier Sentieys, Van-Dung Pham and Ian O'Connor. Energy and Performance Trade-off in Nanophotonic Interconnects using Coding Techniques. In proceedings of the 55th IEEE Design Automation Conference (DAC), Austin, June, 2017. 22% acceptance rate.
  7. Jiating Luo, A. Elantably, V.D. Pham, Cédric Killian, Daniel Chillet, Sébastien Le Beux, Olivier Sentieys and Ian O’Connor. Performance and Energy Aware Wavelength Allocation on Ring-Based WDM 3D Optical NoC. In IEEE International Conference on Design Automation and Test in Europe (DATE), Lausane, March, 2017. 23% acceptance rate.
  8. Martha Johanna Sepulveda Florez, Sébastien Le Beux, Daniel Chillet, Cedric Killian, Jiating Luo, Hui Li, Ian O'Connor, Olivier Sentieys. Communication Aware Design Method for Optical Network-on- Chip. In the proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), Turino, 2015.
  9. Zhen Li, Sébastien Le Beux, Christelle Monat, Xavier Letartre, and Ian O’Connor. Multilevel Modeling Methodology for Reconfigurable Computing Systems Based on Silicon Photonics. In the International IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Montpellier, 2015. Invited.
  10. Qi An, Li Su, Jacques-Olivier Klein, Sébastien Le Beux, Ian O'Connor, Weisheng Zhao. Full-adder circuit design based on all-spin logic device. In IEEE International Symposium on Nanoscale Architectures (NANOARCH) 2015.
  11. Hui Li, Sébastien Le Beux, Yvain Thonnart and Ian O’Connor. Complementary Communication Path for Energy Efficient on-chip Optical interconnects. In proceedings of the 52th IEEE Design Automation Conference (DAC), San Francisco, June, 2015. 22% acceptance rate.
  12. Hui Li, Alain Fourmigue, Sébastien Le Beux, Xavier Letartre, Ian O’Connor and Gabriela Nicolescu. Thermal Aware Design Method for VCSEL-based On-Chip Optical Interconnect. In IEEE International Conference on Design Automation and Test in Europe (DATE), Grenoble, March, 2015. 22.4% acceptance rate.
  13. Luan H.K. Duong, Mahdi Nikdast, Jiang Xu, Zhehui Wang, Yvain Thonnart, Sébastien Le Beux, Peng Yang, Xiaowen Wu and Zhifei Wang. Coherent Crosstalk Noise Analyses in Ring-based Optical Interconnects. In IEEE International Conference on Design Automation and Test in Europe (DATE), Grenoble, March, 2015. 22.4% acceptance rate.
  14. Hui LI, Sébastien Le Beux, Gabriela Nicolescu and Ian O'Connor. Energy-efficient optical crossbars on chip with multi-layer deposited silicon. In 20th IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), Chiba/Tokyo, Japan, January, 2015. 33.9% acceptance rate.
  15. Jiating Luo, Cédric Killian, Sébastien Le Beux, Daniel Chillet, Hui Li, Ian O'Connor, and Olivier Sentieys. Channel allocation protocol for reconfigurable Optical Network-on-Chip. Workshop on Exploiting Silicon Photonics for energy-efficient high-performance computing (SiPhotonics) at HiPEAC 2015, Amsterdam, Netherlands, January 19-21, 2015.
  16. Zhen Li, Sébastien Le Beux, Christelle Monat, Ian O’Connor, Xavier Letartre. Complementary logic interface for high performance optical computing with OLUT. In 22nd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2014.
  17. Mahdi Nikdast, Luan H. K. Duong, Jiang Xu, Sébastien Le Beux, Xiaowen Wu, Zhehui Wang, Peng Yang, and Yaoyao Ye. CLAP: a Crosstalk and Loss Analysis Platform for Optical Interconnects. In the International Symposium on Networks-on-Chip (NOCS), 2014. Invited.
  18. Sébastien Le Beux, Hui Li, Gabriela Nicolescu and Ian O’Connor. A Reconfigurable Optical Network on Chip for Streaming Applications. In Proceedings of the 9th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2014. Invited.
  19. Sébastien Le Beux, Hui Li, Ian O’Connor, Kazem Cheshmi, Xuchen Liu, Jelena Trajkovic and Gabriela Nicolescu. CHAMELEON: CHANNEL Efficient Optical Network-on-Chip.In IEEE International Conference on Design Automation and Test in Europe (DATE), Special Day on Advancing Electronics Beyond CMOS, Dresden, March, 2014. Invited.
  20. Hui Li, Sébastien Le Beux, Gabriela Nicolescu, Jelena Trajkovic and Ian O’Connor. Optical Crossbars on Chip: a comparative study based on worst-case losses. In SiPhotonics, Exploiting Silicon Photonics for energy-efficient heterogeneous parallel architectures, Vienna, January, 2014. Invited.
  21. K. Cheng, S. Le Beux, I. O’Connor, Am/IDG-FET based Reconfigurable Cells versus LUTs: Characteristics Description and Analysis, In IEEE ICM, Beirut, Lebanon, 2013.
  22. Sébastien Le Beux, Ian O’Connor, Zhen Li, Xavier Letartre, Christelle Monat, Jelena Trajkovic, Gabriela Nicolescu. Potential and pitfalls of silicon photonics computing and interconnect. In IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, 2013.
  23. Zhen Li, Sébastien Le Beux, Christelle Monat, Ian O’Connor, Xavier Letartre. Optical Look Up Table. In IEEE International Conference on Design Automation and Test in Europe (DATE), Grenoble, March, 2013.
  24. Sébastien Le Beux, Zhen Li, Christelle Monat, Xavier Letartre and Ian O’Connor. Reconfigurable photonic switching: towards all-optical FPGAs. In 21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC), Istanbul, Turquey, 2013. Invited.
  25. Ian O’Connor, Kotb Jabeur, Sébastien Le Beux and David Navarro. Ambipolar Independent Double Gate FET Logic. In IEEE International Symposium on Nanoscale Architectures (NANOARCH), Amsterdam, July, 2012. Invited.
  26. Kotb Jabeur, Ian O’Connor, Sébastien Le Beux and David Navarro. Ambipolar Double Gate CNTFETs based Reconfigurable Logic Cells. In IEEE International Symposium on Nanoscale Architectures (NANOARCH), Amsterdam, July, 2012.
  27. Kotb Jabeur, Ian O’Connor, David Navarro and Sébastien Le Beux. Low-Power Design Technique with Ambipolar Double Gate Devices. In IEEE International Symposium on Nanoscale Architectures (NANOARCH), Amsterdam, July, 2012.
  28. Kotb Jabeur, Ian O'Connor, Natalya Yakymets and Sébastien Le Beux. Ambipolar double-gate FETs for the design of compact logic structures. In IEEE/ACM International Conference on Great Lakes Symposium on VLSI (GLSVLSI), Salt Lake City, May, 2012.
  29. Hui Zhu, Sébastien Le Beux, Nataliya Yakymets, Ian O'Connor: Using Self-Reconfiguration to Increase Manufacturing Yield of CNTFET-based Architectures. In IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig), december, 2011.
  30. Natalya Yakymets, Sébastien Le Beux, Kotb Jabeur and Ian O'Connor. Multi-Objective Mapping for Matrix-Based Nanocomputer Architectures. In 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Montpellier, June, 2011.
  31. Kotb Jabeur, Ian O'Connor, Nataliya Yakymets, Sébastien Le Beux. High performance 4: 1 multiplexer with ambipolar double-gate FETs. In IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2011.
  32. Kotb Jabeur, Natalya Yakymets, Ian O'Connor and Sébastien Le Beux. Ambipolar double-gate FET binary-decision- diagram (Am-BDD) for reconfigurable logic cells. In IEEE International Symposium on Nanoscale Architectures (NANOARCH), San Diego, June, 2011.
  33. Sébastien Le Beux, Jelena Trajkovic, Ian O’Connor and Gabriela Nicolescu. Layout Guidelines for 3D Architectures including Optical Ring Network-on-Chip (ORNoC). In 19th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC), Hong Kong, 2011. Invited.
  34. Nataliya Yakymets, Kotb Jabeur, Ian O'Connor and Sébastien Le Beux. Interconnect Topology for Cell Matrices Based on Low-Power Nanoscale Devices. In IEEE International Conference on Faible Tension Faible Consommation (FTFC), Marrakech, Maroc, 2011. Invited.
  35. Sébastien Le Beux, Ian O'Connor, Gabriela Nicolescu, Guy Bois and Pierre Paulin. A System-Level Exploration Flow for Optical Network on Chip (ONoC) in 3D MPSoC. Invited to special session on Optical Interconnect for Multi-Core Architectures in IEEE International Symposium on Circuits and Systems (ISCAS), 2010. Invited.
  36. Natalya Yakymets, Kotb Jabeur, Ian O'Connor and Sébastien Le Beux. Mapping Methodology and Analysis of Matrix-Based Nanocomputer Architectures. In IEEE International Conference on New Circuits and Systems (NEWCAS), Bordeaux, June, 2011. Best paper award.
  37. Kotb Jabeur, Natalya Yakymets, Ian O'Connor and Sébastien Le Beux. Fine-Grain Reconfigurable Logic Cells Based on Double-gate CNTFETs. In IEEE/ACM International Conference on Great Lakes Symposium on VLSI (GLSVLSI), Lausanne, June, 2011.
  38. Sébastien Le Beux, Jelena Trajkovic, Gabriela Nicolescu, Ian O’Connor, Guy Bois and Pierre Paulin. Optical Ring Network-on-Chip (ORNoC). Architecture and design methodology. In IEEE International Conference on Design Automation and Test in Europe (DATE), Grenoble, March, 2011.
  39. Maimouna Amadou, Sébastien Le Beux, Gabriela Nicolescu and Ian O'Connor. Functional Mapping for Nanodevice-Based Architectures. Invited to Special Session on CAD Tools for Advanced SoCs in 21th International Conference on Microelectronics (ICM), 2009. invited.
  40. Sébastien Le Beux, Gabriela Nicolescu, Guy Bois, Youcef Bouchebaba, Michel Langevin and Pierre Paulin. Optimizing Configuration and Application Mapping for MPSoC Architectures. In NASA/ESA Conference on Adaptive Hardware and Systems (AHS), July, 2009. invited.
  41. Sébastien Le Beux, Philippe Marquet, and Jean-Luc Dekeyser. A Design Space Exploration Flow for FPGA Implementation of Intensive Signal Processing Applications. In DASIP Conference on Design and Architectures for Signal and Image Processing, Belgium, November, 2008.
  42. Mouna Baklouti, Sébastien Le Beux, Philippe Marquet, Mohamed Abid and Jean-Luc Dekeyser. Implementation of a Simple Massively Parallel Processor System on FPGA: Case Study. In International Conference on Embedded Systems & Critical Applications, ICESCA, May, 2008.
  43. Sébastien Le Beux, Philippe Marquet and Jean-Luc Dekeyser. A Design Flow to Map Parallel Applications onto FPGAs. In 17th IEEE International Conference on Field Programmable Logic and Applications, FPL, Amsterdam, Netherlands, August 2007.
  44. Sébastien Le Beux, Philippe Marquet, and Jean-Luc Dekeyser. Multiple Abstraction Views of FPGA to Map Parallel Application. In 3rd International Workshop on Reconfigurable Communication Centric System-on-Chips, ReCoSoC, Montpellier, France, June 2007.
  45. Philippe Marquet, Simon Duquennoy, Sébastien Le Beux, Samy Meftali, and Jean-Luc Dekeyser. Massively Parallel Processing on a Chip. In ACM International Conference on Computing Frontiers, Ischia, Italy, May 2007.
  46. Simon Duquennoy, Sébastien Le Beux, Philippe Marquet, Samy Meftali, and Jean-Luc Dekeyser. MpNoC Design : Modeling and Simulation. In 15th IP Based SoC Design Conference (IP-SoC 2006), Grenoble, France, December 2006.
  47. Sébastien Le Beux, Vincent Gagne, El Mostapha Aboulhamid, Philippe Marquet, and Jean-Luc Dekeyser. Hardware/Software Exploration for an Anti-Collision Radar System. In the 49th IEEE International Midwest Symposium on Circuits and Systems, MWCAS, San Juan, Puerto Rico, August 2006.
  48. Sébastien Le Beux, Philippe Marquet, Ouassila Labbani, and Jean-Luc Dekeyser. FPGA Implementation of Embedded Cruise Control and Anti-Collision Radar. In 9th Euromicro conference on Digital System Design, DSD, Dubrovnik, Croatia, August 2006. Full paper acceptance rate : 22.38%

- Communications, article published in national conference proceedings and workshop

1. Sébastien Le Beux, Fabien Alibart, Dominique Vuillaume, Catherine Dubourdieu, Ian O’Connor, "Memristive devices: an interconnect solution for matrix-based architectures?" Symposium S: Memristor materials, mechanisms and devices for unconventional computing, E-MRS 2014 Spring Meeting, Lille, France, 26-30 May 2014
  1. Jean-Luc Dekeyser, Sébastien Le Beux, and Philippe Marquet. Une approche modèle pour la conception conjointe de systèmes embarqués hautes performances dédiés au transport. In Workshop International : Logistique & Transport (L'2007), Sousse, Tunisie, November 2007.
  2. Sébastien Le Beux and Loic Lagadec. Madeo, une approche MDA pour la programmation et la synthèse d'architectures reconfigurables. In Symposium en Architecture de machines, SympA'2005, Le Croisic, France, April 2005.

- Technical reports
  1. Sébastien Le Beux, Philippe Marquet and Jean-Luc Dekeyser. Model Driven Engineering Benefits for High Level Synthesis. INRIA technical report, No 6615, August 2008.
  2. Abdoulaye Gamatié, Sébastien Le Beux, Éric Piel, Anne Etien, Rabie Ben Atitallah, Philippe Marquet, Jean-Luc Dekeyser. A Model Driven Design Framework for High Performance Embedded Systems. INRIA technical report, No 6614, August 2008.
  3. Rabie Ben Atitallah, Pierre Boulet, Arnaud Cuccuru, Jean-Luc Dekeyser, Antoine Honoré, Ouassila Labbani, Sébastien Le Beux, Philippe Marquet, Éric Piel, Julien Taillard, and Huafeng Yu. Gaspard2 UML Profile Documentation. INRIA technical report, No 0342, September 2007.
- Talks/seminars (selected)

- 1. Bringing Light to 3D Architectures. Keynote at Rapido workshop, Stockholm, Sweden. 2017.
  2. Enlightening Many-Core Architectures with Silicon Photonic Interconnects. DASIP conference, Rennes, 2016, keynote (pdf)
  3. Thermal Aware Design Method for VCSEL-based On-Chip Optical Interconnect. CMOSETR, Vancouver, Canada, 2015
  4. Energy-efficient optical crossbars on chip with multi-layer deposited silicon. In 20th IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), Chiba/Tokyo, Japan, January, 2015
  5. Optical interconnect in future many core architectures. Talk at Tokyo Institute of Technology, Tokyo, Japan, January, 2015.
  6. Optical interconnect in future many core architectures. IEF seminar, Paris, April, 2014.
  7. CHAMELEON: CHANNEL Efficient Optical Network-on-Chip.In IEEE International Conference on Design Automation and Test in Europe (DATE), Special Day on Advancing Electronics Beyond CMOS, Dresden, March, 2014.
  8. Optical interconnect in future systems on chip. IEEE Talk in Concordia University, Montreal, January, 2014.
  9. Optical interconnect in future systems on chip. Talk in Seminar in Peking University, China, December, 2013.
  10. Highly Regular and reconfigurable ONoC, 31th NII Shonan Meeting Seminar on Many-cores and On-chip Interconnects, September, Japan,
  11. Optical interconnect in future systems on chip. Seminar in Xidian University, Xi'an, June, 2013.
  12. Potential and pitfalls of silicon photonics computing and interconnect. In IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, May, 2013.
  13. Auto-Reconfiguration in Statically Interconnected CNTFET-based Cells (slides, video). Design with Functionality-Enhanced Device (FED) workshop, EPFL, Lausane, March, 2013.