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Associate Professor HDR at Ecole Centrale de Lyon
Lyon Institute of Nanotechnology (INL)
Ecole Centrale de Lyon – University of Lyon
36, avenue Guy de Collongue
69130 Ecully cedex, France
Phone (France): +33 4 72 18 60 47
Email: Sebastien (dot) Le-Beux (at) ec-lyon.fr

Find me on DPLB and Google Scholar


Biography
Sébastien Le Beux is Associate Professor for Heterogeneous and Nanoelectronics Systems Design at Ecole Centrale de Lyon. He is currently responsible for nanoprocessors research activities at the Heterogeneous System Design group of the Lyon Institute of Nanotechnology CNRS laboratory. He obtained his PhD in Computer Science from the University of Sciences and Technology of Lille in 2007. He went on to become a postdoctoral researcher at Ecole Polytechnique de Montréal, Canada 2008-2010. In 2013, he was invited to the University of Science and Technology Hong Kong as visiting scholar. His research interests include design methods for emerging (nano)technologies and embedded systems, including silicon photonic interconnect and reconfigurable architectures. He has authored or co-authored over 70 scientific publications including journal articles, book chapters, patent and conference papers. He serves on the steering committees, organizing committees, and technical program committees of numerous international conferences such as DATE, CODES+ISSS, NOCS and NanoArch. 

Lastest news


news apr.2017 Paper "Energy-Efficiency Comparison of Multi-Layer Deposited Nanophotonic Crossbar Interconnects" has been accepted for publication by IEEE JETC. Congratulations to Hui!

news feb.2017
Paper "Energy and Performance Trade-off in Nanophotonic Interconnects using Coding Techniques" has been accepted for publication by DAC 2017.

news feb.2017 I have been invited as a Reviewer Committee Member (RCM) for the “Digital & Computing Circuits & Architectures” track of the NEWCAS 2017 conference.

news jan.2017
I have been invited as a TPC member of the NOCS 2017 conference! 

news dec.2016 I have been invited to give a lecture on high performance computing at the 4th Summer School on INtelligent signal processing for FrontIEr Research and Industry (INFIERI) in feb.2017 !

news dec.2016 I have been invited as a TPC member of the NEWCAS 2017 conference!

news nov.2016 I have be invited to give a keynote at the Rapido'17 workshop

news sept.2016 Paper "Performance and Energy Aware Wavelength Allocation on Ring-Based WDM 3D Optical NoC" has been accepted for publication by IEEE DATE 2017. Congratulations to Jiating!

news
21.Sept.2016
10th edition of IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC) opens!

news
26.June.2016
Call for Papers for Special Issue on Emerging Technologies and Architectures for Manycore Computing, IEEE Transactions on Multi-Scale Computing Systems, is released. Please submit your paper by 1.Dec.2016 (pdf).

news 19.apr.2016
Paper "Towards Maximum Energy Efficiency in Nanophotonic Interconnects with Thermal-Aware On-Chip Laser Tuning" has been accepted for publication by IEEE TETC (pdf). Congratulations to Hui!


news 10.apr.2016 I have been invited as a topic Co-Chair of the DATE 2017 conference!

news 18.mar.2016
Thank you all for attending the second edition of the OPTICS workshop in Dresden!

news 28.jan.2016 I have be invited to give a keynote at the DASIP'16 conference (pdf)

news 9.jan.2016 I have been invited as a TPC member of the CODES+ISSS 2016 conference!

news 7.dec.2015 I have been invited as a TPC member of the NOCS 2016 conference!

news 2.dec.2015 Paper "Coherent and Incoherent Crosstalk Noise Analyses in Inter/Intra-chip Optical Interconnection Networks" has been accepted for publication by IEEE TVLSI. Congratulations to Luan!

news 16.oct.2015 Hui Li is the recipient of the Lyon Institute of Nanotechnology best PhD presentation award 2015!  Congratulations!

news 15.mar.2015 Paper "Complementary Communication Path for Energy Efficient on-chip Optical interconnects" has been accepted by DAC'16 Conference. Congratulations to Hui!

news 15.dec.2014 Papers "Thermal Aware Design Method for VCSEL-based On-Chip Optical Interconnect" and "Coherent Crosstalk Noise Analyses in Ring-based Optical Interconnects" has been accepted by DATE'15 conference. Congratulations to Hui and Luan!

news 15.sep.2014 Paper "Energy-efficient optical crossbars on chip with multi-layer deposited silicon" has been accepted by ASP-DAC'15 conference. Congratulations to Hui!

news 1.sep.2014
Paper "Ambipolar Independent Double Gate FET (Am-IDGFET) for the design of compact logic Structures" has been accepted for publication by IEEE TNANO. Congratulations to Kotb!

news 1.jun.2014 Paper "A Case Study of Signal-to-Noise Ratio in Ring-Based Optical Networks-on-Chip" has been accepted for publication by IEEE D&T. Congratulations to Luan!

news 17.apr.2014 Paper "Multi-Level Mapping of Nanocomputer Architectures Based on Hardware Reuse" has been accepted for publication by IEEE JETCAS. Congratulations to Nataliya!