Awards and Honors:
1. Best Paper award in all Tracks, International Conference (ICCCN'17) NITTTR Chandigarh, 20172. Best Paper award in Machine Learning Track, International Conference (ICCCN'17) NITTTR Chandigarh, 20173. ISTE Visiting Professor (Computer Engineering), ISTE New Delhi, 2009-20104. Sarojini Damodaran International Fellowship during PhD January 20025. Computer Engineering Division Gold Medal (Best journal paper) 1992-19936. University Rank Gold Medal Bachelor degree 1986-19877. University Rank Gold Medal Master degree 1991-19928. National Merit Scholarship, Govt of India, 1982-1988
Research Talks:
1. “Unifying Time Constraints Validation,” at Faculty Forum Computer Science Department, CWI, Netherlands2. “Validating Real-Time Behavioral Patterns of Embedded Controllers,'' at International Workshop on Specification and Validation of UML Models for Real-Time and Embedded Systems, San Francisco, USA3. "Developing Software Tools for System Design and Analysis," School of Computing, National University of Singapore (NUS), Singapore4. "Design and Validation of Embedded Systems in Esterel," School of Computer Engineering, Nanyang Technological University (NTU), Singapore5. “Data Analytics Applications: Algorithmic Perspective,” Gujarat Technological University (GTU), Ahmedabad6. “Big Data: Challenges and sample solutions,” at the workshop on Big data, Infosys, Hinjewadi, Pune
Other Invited Talks:
7. "Restructuring Universities for coping with the Challenges of the 21st Century" Gujarat Technical University (GTU), Ahmadabad8. "Accreditation: Understanding and Preparation," ISTE FDP FRCE Mumbai9. "Understanding and Mapping of the Course Outcomes and Program Outcomes," Symbiosis Institute of Technology (SIT), Lavale, Pune
Implementations:1. SyncRT: Tool for Validation of Timing Constraints in Esterel using Lex, Yacc, C, and Tcl/Tk.2. Industrial case study example of the gear controller, various case studies, protocols, using Esterel, Charon, and UML.Other Responsibilities:
• Institute Level AICTE CII • Institute Level Quality Assurance • Institute Level Physical Stock Verification • Vice Chair IEEE Computer Society (Govt/Academia)• Accreditation Evaluator (NBA) (Tier-I and Tier-II)• Head, 2008-2009, 2012-2014• Maharashtra Public Service Commission (MPSC) Expert (Class-1: Prof, Asso & Assist Prof, Sysadmin)• Member of Academic Council, Research Recognition, Board of Studies at Universities, NITs, and Autonomous Institutes• ACM COEP Chapter faculty• Evaluator AICTE, UGC, evaluation of research proposals• Wikipedia Teaching Fellow• TEQIP Dept Coordinator• Reviewer IEEE, Elsevier• PhD admissions coordinator• Examiner at Universities and NITs for M Tech and PhD Thesis• Examiner PhD (Entrance Exams) and Member FY, SY B Tech admissions• Reviewer/PC Member/Track Chair/ of IEEE /Springer Conferences: ICSICCS-2018 (Springer), ICICCT2018 (Springer), IC4S-2018, A2ICS-2017, ICCI-2017 IITK, IV-2017 USA, ICAC3-2017, ICICCT-2017, CICN 2017 Cyprus, IC4S-2017, IDEA 2017, ICSICCS-2017, IOT4TD-2017, ICACCI-2017 (TPC), ICEI-2017, ICCUBEA-2017, CAST 2016, ... and earlier • Faculty Advisor, M Tech and B Tech• DTE Nominee, Faculty Recruitment and Member, Staff Recruitment• Chairman DTE Inspection Committees and Chancellor Nominee, Faculty Recruitment