Research
Summary:
I am primarily interested in developing techniques for power management, cost reduction and security for ultra-low-power processors that will power the upcoming/on-going IoT paradigm. I am also interested in a variety of topics such as architecture from security, AI and design automation.
Conference Papers:
Shashank Hegde, Subhash Sethumurugan, Hari Cherupalli, Henry Duwe, John Sartori (2021). Constrained Conservative State Symbolic Co-analysis for Ultra-low-power Embedded Systems. In: 26th Asia and South Pacific Design Automation Conference (ASP-DAC). (PDF)
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, and John Sartori (2017). Software-based Gate-level Information Flow Security for IoT Systems. In: 50th IEEE/ACM International Symposium on Microarchitecture (MICRO). (PDF)
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, and John Sartori (2017). Bespoke Processors for Applications with Ultra-low Area and Power Constraints. In: 44th ACM/IEEE International Symposium on Computer Architecture (ISCA). Micro Top Picks 2017. (PDF)
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, and John Sartori (2017). Determining Application-specific Peak Power and Energy Requirements for Ultra-low-power Processors. In: 22nd 2017 ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). Best Paper Award. (PDF)
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, and John Sartori (2017). Enabling Effective Module-oblivious Power Gating for Embedded Processors. In: 23rd IEEE International Symposium on High Performance Computer Architecture (HPCA). (PDF)
Hari Cherupalli, and John Sartori (2017). Scalable N-worst Algorithms fro Dynamic Timing and Activity Analysis. In: 36th International Conference on Computer-Aided Design (ICCAD) (PDF)
Amrut Kapare, Hari Cherupalli, and John Sartori (2016). Automated Error Prediction for Approximate Sequential Circuits In: 35th International Conference on Computer-Aided Design (ICCAD). (PDF)
Hari Cherupalli, Rakesh Kumar, and John Sartori (2016). Exploiting Dynamic Timing Slack for Energy Efficiency in Embedded Systems In: 44th ACM/IEEE International Symposium on Computer Architecture (ISCA). (PDF)
Hari Cherupalli, and John Sartori (2015). Graph-based Dynamic Analysis: Efficient Characterization of Dynamic Timing and Activity Distributions. In: 34th International Conference on Computer-Aided Design (ICCAD) (PDF)
Journal Papers:
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, and John Sartori (2017). Determining Application-specific Peak Power and Energy Requirements for Ultra-low-power Processors. In: ACM Transactions of Computer Systems (TOCS), 2017. (PDF)
Hari Cherupalli, Henry Duwe, Weidong Ye, Rakesh Kumar, and John Sartori (2017). Bespoke Processors for Applications with Ultra-low Area and Power Constraints In: IEEE Micro, Top Picks from Computer Architecture Conferences, 2018. (PDF)
Posters :
Hari Cherupalli, John Sartori, Rakesh Kumar (2014). Exploiting Workload Dependent Timing Slack for Energy Efficiency in Embedded Systems In: 51st Design Automation Conference (DAC), San Francisco, CA, 2014.
Patents:
Please find them here.