I was making two pieces for sure.
The production was not without any problems of course. A project is published on the Lotharek’s website, but it is only out of 80 % complete.
It is a pity a little bit that he didn’t react to my e-mail, he perhaps wanted me to think it out myself.
So the schematic is probably the unfinished version 2k14, but it is 2k11 no more (there is already a connector for the joystick).
The schematic doesn’t correspond to the pictures of the product. The designators are diferrent there and it is not yet ready for the use LED ACT.
It is suppoused to blink while joystick is active, but according to the schematic, it can only be turned on and off with the switch.
The fact that it is suppoused to blink on 2k14 is written in the manual and I have seen it in a video too.
Hare, a problem arose. The fact that LED is connected in the opposite way could be observed from a lot of pictures.
But it couldn’t be observed, where it is actually connected. I took my chances. Regarding to the concept, Lotharek was trying to simplify it a lot,
so it could be expected, it will be the nearest pin from CLPD.
So I chose two nearest pins and made a simple jumper by them and hoped I would be succesfull.
Then I had to hope, this function is implemented in the JEDEC file (for CLPD).
There was this hope here. The schematic was made in January, but JEDEC is only from May.
I am not gonna bring drama, I got lucky with the pin and JEDEC file. The jumper is already connected in the picture.
The use of the four-layer printed circuit was another obstacle for me. But because I have designed a plenty of the printed circuits,
I told myself, „I am gonna make it“ and I made it. My concept is only two-layer.
The connecting VCC and GND on the joystick’s connector is not obvious from the schematic.
I found several connectings of Kempston joysticks on the internet and I hope, I found the right one. If not, there are zero resistances as jumpers.
The last thing that I had to think a lot was mixing the data and the adress bus in the memories.
Here, notice by the EEPROM that ‚A12 goes to A0, A0 goes to A1 etc. There is the same mess on the data bus, and RAM is in the same way.
I understand that. Regarding to the chip, it doesn’t totally matter how scattered it is, especially when it is about RAM. But EEPROM, that is in the socket?
Regarding its production, it makes sense. PCB designs it as simple as possible, it burns first EEPROM with the program on the Spectrum and then it can only copy the EEPROM.
But such a memory is unreadable for the others and also noone can burn it on the programmer himself, which is impractical.
It is definitely no protection, because third parties deliver the firmware (see Manual) and the flashing program is available for free.
I didn‘t like it like this and I put it right.
So, here it is very nicely displayed, so I stick the EEPROM into the programmer, load BIN and flash it – done.
Edit 17.10.2017
I never build nor study the original divIDE, until now. I found that the buses are mixed there too.
So the freak is me not the Lotharek :-(
It is pity that Lotharek didn’t publish the source codes for CPLD.
There were no problems while turning this on. I have only loaded esxDOS so far, which is enough for me for now. Tests went on Harlequin rev. H. of course.
Here is the project, if you are interested. Good Luck.
Edit 15.10.2018
No, the project is no longer here. It has been removed :-(
cztomeco@gmail.com