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Development of digital neuromorphic processor full stack
Development of digital neuromorphic processor full stack
- Digital neuromorphic event processor (Neo) design
Neo is a 28nm 7.29mm2 32-core digital neuromorphic event processor with a synaptic operation (SynOP) efficiency of 23.7pJ/SynOP at 0.9V/95MHz and full topology reconfigurability.
- Lightweight spiking neural network design
Weight quantization framework: constrained backpropagation (CBP) with the Lagrangian function (conventional loss function plus well-defined weight-constraint functions) as an objective function. This work utilizes CBP as a post-training algorithm for deep SNNs pre-trained using various state-of-the-art methods including direct training (TSSL-BP, STBP, and surrogate gradient) and DNN-to-SNN conversion (SNN-Calibration), validating CBP as a general framework for QSNNs.
- Network mapping algorithms
This method is based on the discrete Lagrange Multiplier Method, which uses a total memory usage as an objective function alongside constraint functions (memory usage per core). Our results show that this method achieves optimal spiking unit distributions with high core memory utilization (> 70%) for the reduced ResNet models.
Development of digital accelerators for deep learning
Development of digital accelerators for deep learning
- SRAM-based in-memory processor integrated with special function units
Novel dataflow for process-in-memory: our PIM dataflow that significantly reduces buffer traffic by maximizing data reuse and improving memory utilization during depthwise convolution.
- Nonvolatile memory IP and memory compiler
We design SKY130 process-based embedded RRAMs for always-on in-memory processors and event processors for on-device AI.
Deep learning algorithms
Deep learning algorithms
- Knowledge-based active inference and language models
We develop knowledge-based active inference algorithms for ultimate artificial general intelligence. For the moment, we identify the feasibility of knowledge-based active inference on landmark searches and language models.
Landmark search: active inference for landmark search can be an operation-efficient alternative to conventional convolution-based methods.
Large language model: we conceive hierarchical structure of language (tokens, sentence, paragraph, context, knowledge) and use knowledge-based active inference for large language models to enhance their efficiency.
Current research projects
Current research projects
Development of RRAM-based neuromorphic processor and multichip system for real-time processing event data (2023.4 - Present) Sponsored by IITP
Development of CMOS-compatible low-current self-rectifying memristor arrays and integrated circuits (2024.3 - Present) Sponsored by NRF
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