RS-bus

RS-bus monitor hardware

The RS-bus monitor hardware is based on the DCC monitor hardware, but the parts responsible for decoding the DCC signal are replaced by RS-Bus specific parts. These RS-bus specific parts are mounted on a separate PCB and connected to jumper JP4 on the DCC monitoring board.

The operation of the RS-bus is described on the DerMoba website. Although RS-Bus slaves are based on measuring current (instead of voltage) levels, the master actually measures the voltage on the wires (through the transistor T2, as described in the circuit on the DerMoba website). Current measurement on the monitor board is relatively complicated, since that requires changes to the RS-bus wiring to allow the master and monitor board to operate in series. For that reason the monitoring board is based on voltage measurement as well. Unfortunately, the edges of the Voltage signals are not as sharp as with current measurement.

The RS-bus is directly connected via KL4 to two comparators (within a single LM393 housing). BC560 transistors are used to connect the output of both comparators to two 6N136 optocouplers, which electrically decouple the RS-bus from the remaining monitoring hardware. Such electrical isolation is essential; the 12 V ground signal for both comparators should not be connected to the ground signal of the remaining monitoring or DCC hardware! The RS-bus monitoring hardware requires a separate and stable 12 Volts power supply.

The output pins of both 6N136 optocouplers are connected to jumper JP4. Pin 2 of that jumper is connected to INT1 (PD3) of the ATmega162, which is the same pin as used by the basic monitor hardware for the DCC input Pin 3 of JP4 is connected to INT0, which is the pin immediately next: PD2.

The comparator trip point for the comparator connected to Pin 3 of JP4 is not critical; it is about 9 Volts. The other comparator trip point is critical. Use the potentiometer to set the trip point in one of the following ways:

• With no connection to the 1M5 resistor: 4,80 V
• With input terminal R tied to ground: 4,90 V
• With input terminal R tied to +12V: 4,70 V

Although these three approaches are fundamentally different, they all provide acceptable results since a few tens of millivolts deviation seem okay. Note that the voltage levels mentioned above are based on measurements and experiments using an oscilloscope. If the values above do not work in your setting, you will have to connect a scope and try to find the correct trip points. The responder sending a 0-bit should be below the lower trip point and the responder sending a 1-bit should be above the upper trip point. The INT1 input pin is the inverted signal sent by the responder. The hysteresis on the input signal was designed to be about +/- 0,1 Volts, but the actual values are slightly different.

Tip: when trying to get the responder signal on the scope connected between R and S, set your scope to trigger on a negative edge. Keep the responders inactive. Slowly change the trigger point of the scope from high to low until the scope is not triggered anymore by the signal shape sent by the command station. Now make a responder send data, and try to get the trigger point of the scope at that level that it ''is'' triggered by the low voltage of the responder but not by the pulses sent by the command station.

If this method of measurement seems error prone and unreliable in practice, a current measurement for the responder signal could be implemented instead of a voltage measurement. The change to the code is probably minor (it needs to account for the fact that command station pulses can generate a large enough current to register on INT1 as well, so those would have to be discarded by, in a nutshell, comparing the state with INT0).

Background

The description below provides some background regarding RS-bus measurements using a digital storage oscilloscope. Please note that the vertical calibration of the scope is off; the waveforms and timebase are correct, but the amplitude is not. The voltages therefore provide a rough indication.

Voltage measurements

Below a number of RS-bus voltage measurements, first for the case a single decoder is connected to the RS-bus, followed by the multiple decoder case.

One responder

The following measurements are done with one responder (slave) connected to the RS-bus.

This image shows an overview of the message sent by the responder. First the pulse train sent by the command station (high voltage is active); when the address of the responder is reached, the responder sends the bit series '0010110001', including start and stop bit. Interpretation: [[RS-bus protocol specification#databyte | "Stand-alone"]] type responder saw E8 become active, rest passive. A 0-bit (space symbol) is sent by current flowing through the responder, causing a drop in voltage on the RS terminals to 5.10 V (on the scope, but it's calibration is completely off!). For a 1-bit (mark symbol), the responder becomes passive again, and the voltage raises to 5.79 V. The 4 levels in the picture are:

• 11.72 V: command station active (address pulse)
• 7 V: both command station and responder passive
• 5.79 V: both command station and responder passive
• 5.10 V: responder active (space symbol)

The vertical markers in the scope image are set at the start and end of the start bit. When the command station becomes passive, the first part of the drop in the voltage is quick, but then it becomes more gradual, and doesn't get the chance to settle before the next pulse is sent. Likewise, when the responder becomes passive again, the voltage raise is also gradual; but since the total voltage swing between a space and a mark symbol is much smaller, the voltage does almost settle. In both cases, an active state causes a steep slope. I suppose that, given enough time, the 7 V voltage in the picture would in the end settle at 5.79 V.

This image is zoomed in on the 3rd bit (a 1-bit in between 0-bits). It turns out that the voltage has quite jagged edges; perhaps because of the current source compensating? The edges were quite different between measurements; apparently it depends on several factors. The vertical markers are around the 3rd bitperiod, the horizontal markers indicate the voltage rise after one-fourth of a bit period.

These are the 5th and 6th bits; both 1-bits. They show how the voltage settles some more if it is given two bit-times to do so.

Multiple responders

To see the effect on the waveform of connecting multiple responders , I took a few more pictures of the 3rd bit with different numbers of responders attached. Note how there are hardly any edges even with one responder, quite unlike the [[#first-3rd | first measurement]] above!

{| border="0" | [[Image: RS-bus scope 3rd bit multi-1.png]] | [[Image: RS-bus scope 3rd bit multi-2.png]] | [[Image: RS-bus scope 3rd bit multi-5.png]] |- | One responder || Two responders || Five responders |}

Perhaps the jagged edges get worse with more responders. I am not sure. The state where both command station and responders are passive is probably the state that is most affected by the number of responders; the other two are driven quite actively by either the master or a responder.

Current measurements

The following current measurements are done by measuring the voltage over a 10 Ω resistor in series between the master and the responders.

This image is the current measurement of the waveform that corresponds to the [[#overview | overview picture]] in the voltage measurement, with a smaller timebase (it is "zoomed in"). One responder is connected. Since each responder draws 3 mA current from the command station pulses, you can see a small square wave during the address pulses. When the responder sends a space symbol, a nice square wave can be seen corresponding to 20 mA. When it sends a mark, it neatly drops back to 0 again. A much cleaner signal, but obviously also a much lower voltage swing, only 200 mV with a 10 Ω resistor. The horizontal markers are on either side of the start bit.

This is the same waveform but with 5 responders connected. The 3 mA drawn by each responder obviously adds up. This is also the reason why voltage measurement would be required as well if current measurement were done. One would use the voltage measurement to detect the master pulses. During such a pulse, a current measured should not be interpreted as a responder sending a space. When there is a substantial current, but the master is not sending an address pulse, then apparently it ''is'' a responder. The 10 Ω resistor did not cause any problems for the master in my setup. It is probably low enough to not distort the communication.

Implemementation

I have chosen to use only voltage measurements. This is done with two simple comparators with some added hysteresis for stability (about 20 mV). The threshold for the address pulse measurement is not critical, and about 9 volts. The threshold for measuring the responses is very critical, and experimentally determined.

This image shows the 3rd bit in voltage measurement again, with the horizontal markers set at the upper and lower thresholds. When the signal goes below the lower threshold, the output of the comparator goes low, if it goes above the upper threshold, the output of the comparator goes high (it functions as a Schmitt trigger). The two comparators are connected to two external interrupt lines on the µC. An address pulse will trigger an interrupt, as will a space symbol sent by a responder, such as a start bit.

How to implement current measurement

Below some considerations for implementing current measurement. Such approach may be considered since at larger layouts voltage measurements on the RS-bus may no longer work reliable. Note, however, that it is also possible to use a Lenz USB/Ethernet interface to obtain RS-bus feedbacks; the second version of the DCCMon software supports the decoding of RS-bus feedback messages from the Lenz USB/Ethernet interface.

If a 10 Ω resistor is used to measure RS-bus current, the resulting voltage is 200 mV on reception of data from a responder. This might be enough to feed directly into the comparator, without amplification. Still some hysteresis on the comparator is needed to stabilize the signal. The outputs of the comparators can be connected in the same way, only the firmware will need to be modified.

I think it will work if the interrupt handler for the pulses from the command station (INT0) is changed in the following ways:

• * Make the interrupt trigger on both edges * Edge-detect as follows ** Clear pending INT0 (yes, inside the INT0 handler) ** ''Then'' read INT0 state **: This means that minor oscillation between the edge that triggered the interrupt and the interrupt handler executing is discarded by the handler. Then we read state. If the signal had an edge between the clearing of the pending interrupt and the reading of the state, then that edge will be handled by a new execution of the handler. Fortunately the AVR uses the same synchronization logic for edge detection and reading an I/O-pin, so we know that if we accidentally read back a glitch instead of the stable signal state, at least that glitch also triggered a new interrupt. If you do not understand this last part, disregard it. We focus on the handling of the read value from here on. * On a falling edge (pin read back as 0), execute the original interrupt handler, but don't enable INT1 yet. A command station address pulse might trigger INT1 as well. INT1 might have already triggered before this handler is executed, so keep the code clearing state to RS_ADDR that is already in the original interrupt handler, including the TIMER0 disable code. * On a rising edge (pin read back as 1), it should clear a pending INT1, enable INT1 and clear the state to RS_ADDR as is done on the falling edge, including disabling TIMER0. This will make INT1 trigger on a startbit and queue the timer. *: It should be noted that INT1 might trigger on the last bit of the command station address pulse. In my setup, responders where real quick with their startbit after the address pulse, so it doesn't matter if it triggers on the end of the address pulse or the start of the startbit since they are basically at the same moment. If this condition does not hold, reception might be impaired. Also note that INT1 triggering on the last bit of the address pulse with no following responder reply will mean the startbit is read as a mark and the system will be back in the RS_ADDR state.

If the responder is not quick enough with its startbit (which I described as "the reception might be impaired"), the current measurement could be much more difficult. You would need some delay mechanism and a filter to know the difference between a command station pulse and a responder sending data.