Palette & Graphics bits to Pixels

The bit to color mapping for Atari 7800 graphics for modes other than 160A and 320A can be confusing and difficult to use.  However, it allowed General Computer Corporation to add the addition graphics modes to the Atari 7800 without adding a lot of extra transistors to the Maria GPU.

The graphics modes of the 7800 are controlled by three bits: Write Mode (one bit) and Read Mode (two bits).  These relate to how the Maria GPU creates the display.

Inside the Maria GPU there are 1600 bits of RAM used to store the data for the display.  The RAM is arranged as two buffers of 160 words with each word being 5 bits each.  While one buffer is being written based upon the current display list, the other is read to produce the display output. The Write Mode changes how the graphics (sprite) data is written to the buffer while the Read Mode changes how the data in the buffer is used to generate the display.

Write Mode = 0 (160A, 320A, 320D)

For this write mode the palette bits from the display list entry are stored into the three most significant bits of the words in the display buffer while the two least significant bits are taken from the graphics data (in MSB order) resulting in 4 words per byte of graphics data.

P2P1P0G7G6 P2P1P0G5G4 P2P1P0G3G2 P2P1P0G1G0

Write Mode = 1 (160B, 320B, 320C)

For this write mode only the most significant bit of the palette bits from the display list entry is used - as the most significant bit of the display buffer words.  As with write mode = 0, the two least significant bits in the two words are from the four most significant bits in the graphics data.  Then the middle two bit in the words are taken from the four least significant bits in the graphics data.  Thus this mode results in two words per byte of graphics data.

P2G3G2G7G6 P2G1G0G5G4

The odd ordering of the graphics data bits is likely to reduce the amount of gates required to implement this mode as three of the five bits are written the same for both modes.

Transparency

Transparency is independent of the read and write modes and is solely based upon whether the two least significant bits being written to the display buffer word are both zero.

Read Mode = 00 (160A, 160B)

This is the simplest read mode and is used for both 160 res modes.  Each word in the display buffer is used as an index into the palette registers which then generates a single pixel.  If the two least significant bits are zero then the BCKGRND register is used.

B4=* B3=* B2=* B1=0 B0=0 -> BCKGRND
B4|B3|B2 -> P# B1|B0 -> C#

B4=1 B3=0 B2=1 B1=0 B0=1 -> P5C1

Read Mode = 10 (320B, 320D)

For the two 320 read modes, each display buffer word is used to generate two pixels via the palette registers as with Read Mode = 00.  However, with Read Mode = 10 the two LSBs of the palette bits are always zero and the color bits are swizzled.

B4=* B3=0 B1=0 -> BCKGRND B4=* B2=0 B0=0 -> BACKGRND
B4=0 -> P0 B1|B3 -> C# B4=0 -> P0 B0|B2 -> C#
B4=1 -> P4 B1|B3 -> C# B4=1 -> P4 B0|B2 -> C# 

B4=1 B3=0 B2=1 B1=0 B0=1 -> BG P4C3

Read Mode = 11 (320A, 320C)

For this mode the the mapping of the display buffer words to palette bits is the same as ReadMode = 00 but the color LSB is always zero resulting in either BCKGRND or C2 being displayed

B4=* B3=* B2=* B1=0 -> BG B4=* B3=* B2=* B0=0 -> BG
B4=* B3=* B2=* B1=0 -> BG B4|B3|B2 -> P# B0=1 -> C2
B4|B3|B2 -> P# B1=1 -> C2 B4=* B3=* B2=* B0=0 -> BG
B4|B3|B2 -> P#, B1=1 -> C2 B4|B3|B2 -> P# B0=1 -> C2

B4=1 B3=0 B2=1 B1=0 B0=1 -> BG P5C2