Group

The DST INSPIRE Faculty project (Grant No. IFA-13 ENG-62) ran from April 2014 to March 2019. Under the aegis of this project the Advanced Semiconductors and Computational Nanoelectronics Laboratory (ASCNeL) was established at School of VLSI, IIEST Shibpur. Dr. Sengupta led this research group during the tenure of his INSPIRE Faculty award.

Our group mostly focused on low dimensional materials (such as 2D transition metal dichalcogenides, layered black/ blue phosphorous, GNRs, CNTs etc.) for their application in next generation nanoelectronic FETs and memories.

The research mostly involved atomistic simulations on next generation electronic materials and nanostructures (with a focus on 2D materials), we are also involved in the Non-Equilibrium Green's function (NEGF) simulation of nanoscale FETs.

Our motto :: Expanded ideas miniaturized devices …

A tool developed for Metal-MoS2-Metal SBFET is presented in the form of a Matlab Add-on in this link ..... (You would require Matlab to run this)

Past Members

Ph.D. students

Dr. Lopamudra Banerjee (DST Women Scientist -A) joint supervision with Prof. H. Rahaman, IIEST-Shibpur

Status: Ph.D. Awarded 15 Jan 2020, IIEST, Shibpur (Regn. No.R/2015/121)

Thesis title: "Performance analysis of alternative 2-D Channel materials in MOSFET"

Present designation: DST Women Scientist, School of VLSI, IIEST- Shibpur

Dr. Bikash Sharma (AICTE-QIP Fellow) joint supervision with Prof. C.K. Sarkar, Jadavpur University

Status:Ph.D. Awarded 30 Oct 2018, Jadavpur University (Reg. No. D-7/E/926/15)

Thesis title: "Computational Study of Low-dimensional material for applications in nanoelectronic devices and memories"

Present designation: Associate Professor, Dept. of ETCE, Sikkim Manipal Institute of Technology, Sikkim

Dr. Arnab Mukhopadhyay (Project Fellow- Funded by DST INSPIRE project) joint supervision with Prof. H. Rahaman, IIEST-Shibpur

Status: Ph.D. Awarded 17 June 2019 IIEST, Shibpur (Regn. No.R/2015/125)

Thesis title: "Performance analysis of 2D materials for deigning new generation nanoscale FETs"

Present designation: Assistant Professor, ECE Dept, CV Raman Engg College, Odisha

M.Tech.(VLSI Design) students

(2014-16 batch)

Mr. Sahid Iqbal Mallick Ms. Monalisa Ghosh Ms. Subhechha Shyamal Banerjee

M.Tech. (2014-16) 2^nd year M.Tech. (2014-16) 2^nd year M.Tech. (2014-16) 2^nd year

(2013-15 batch)

Mr. Chayan Kundu Ms. Madhurima Guha Mr. Pratyush Kr. Jha

M.Tech.(VLSI Design) 2015 M.Tech.(VLSI Design) 2015 M.Tech.(VLSI Design) 2015

M.Tech. (VLSI design) thesis supervision – Completed: 6

1. Mr. Chayan Kundu, M.Tech. (VLSI design) thesis IIEST Shibpur 'Computational study of advanced non-volatile memory devices' Year – 2015.

2. Ms. Madhurima Guha, M.Tech. (VLSI design) thesis IIEST Shibpur 'Signal Integrity Analysis and Transport Properties of Graphene Nanoribbon (GNR) Interconnects ', co-guide:M. Sahoo, School of VLSI Tech, IIEST Shibpur. Year -2015.

3. Mr. Pratyush Jha, M.Tech. (VLSI design) thesis IIEST Shibpur 'Studies on Nanocrystal embedded non-volatile memory devices'. Year – 2015.

4. Mr. Sahid Iqbal Mallik, M.Tech. (VLSI design) thesis IIEST Shibpur ‘Investigation of carbon nanotube-metal contacts’ Year -2016.

5. Ms. Monalisa Ghosh, M.Tech. (VLSI design) thesis IIEST Shibpur ‘Study of impact of defects or deformations in 2D materials’ Year-2016.

6. Ms. Subhechha Syamal Banerjee, M.Tech. (VLSI design) thesis IIEST Shibpur, ‘Dependence of electronic, thermal and spin-polarized current transport on defects in 2D materials’ Year – 2016.