Publications

P. Raghavan, D. Novo Bruna, F. Catthoor and A. Kritikakou, “Method and Device for Reducing Power Consumption in Application Specific Instruction Set Processors”, US Patent Application No: 2011/0055,836, Aug., 2010

A. Kritikakou, F. Catthoor and C. Goutis, “Scalable & Near-optimal Design space Exploration for Embedded systems”, Springer, 2014

F. Catthoor, P. Raghavan, M. Jayapala, A. Kritikakou and J. Absar, “Ultra-Low Power Domain Specific Instruction Set Processors”, Springer, 2010

L. Mo, A. Kritikakou and O. Sentieys, “Imprecise Computation Task Mapping on Multi-Core Wireless Sensor Networks”, Encyclopedia of Wireless Netwroks, Springer, 2018

H. Michail, A. Gregoriades, V. Kelefouras, G. Athanasiou, A. Kritikakou and C. Goutis, “Authentication with RIPEMD-160 and other alternatives: A Hardware Design Perspective”, New Advanced Technologies, IN-TECH Inc. Publishers, Vienna, Austria, pp. 103-124, 2010

A. Kritikakou and S. Skalistis, “ Mitigating Mode-Switch through Run-time Computation of Response Time”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TODAES), 2023 (IF: 2.807, SJR: Q1)

L. Mo, Q. Zhou, A. Kritikakou and X. Cao, “Energy Optimized Task Mapping for Reliable and Real-Time Networked Systems”, ACM Transactions on Sensor Networks (TOSN), 2023 (IF: 2.273, SJR: Q1)

M. Cui, A. Kritikakou, L. Mo, and E. Casseau, “Near-optimal Energy-Efficient Partial-Duplication Mapping of Real-Time Parallel Applications ”, Elsevier Journal of System Architecture (JSA), 2023 (IF: 3.746, SJR: Q1)

F. dos Santos, A. Kritikakou, J.E. Rodriguez Condia, J.D. Guerrero-Balaguera, M. Sonza Reorda, O. Sentieys, and P. Rech, “Characterizing a Neutron-Induced Fault Model for Deep Neural Networks”, IEEE Transactions on Nuclear Science (TNS), 2022 (IF: 1.679, SJR: Q2)

X. Li, L. Mo, A. Kritikakou and O. Sentieys, “Approximation-aware Task Deployment on Heterogeneous Multi-core Platforms with DVFS”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022 (IF: 2.273, SJR: Q1)

R. Psiakis, A. Kritikakou and O. Sentieys, “Dynamic Fault-Tolerant VLIW Processor with Heterogeneous Function Units”, Elsevier Microprocessors and Microsystems (MICPRO), 2022 (IF: 1.161, SJR: Q3)

M. Cui, A. Kritikakou, L. Mo, and E. Casseau, “Energy-aware Partial-Duplication Task Mapping under Real-Time and Reliability Constraints for multiple DVFS schemes”, Springer International Journal of Parallel Programming (IJPP), 2022 (IF: 1.244, SJR: Q3)

R. Mercier, C. Killien, A. Kritikakou, Y. Helen, and D. Chillet, “BiSuT: A NoC-Based Bit-Shuffling Technique for Multiple Permanent Faults Mitigation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (IEEE TCAD), 2021 (IF: 2.402, SJR: Q1)

L. Mo, A. Kritikakou, O. Sentieys, and X. Cao, “Real-time Imprecise Computation Tasks Mapping for DVFS-Enabled Networked Systems” IEEE Journal of Internet of Things (IEEE JIOT), 2021 (IF: 11.705, SJR: Q1)

A. Kritikakou, R. Psiakis, F. Catthoor, and O. Sentieys, “Binary Tree Classification of Rigid Error Detection and Correction Techniques” Journal of ACM Computed Surveys (ACM CS), 2020 (IF: 8.960, SJR: Q1)

L. Mo, X. Cao and A. Kritikakou, “Event-Driven Joint Mobile Actuators Scheduling and Control in Cyber-Physical Systems”,IEEE Transaction on Industrial Informatics (IEEE TII), 2019 (IF: 1.514, SJR: Q2)

L. Mo, and A. Kritikakou, “Mapping Imprecise Computation Tasks on CyberPhysical Systems”, Springer Peer-to-Peer Networking and Applications (Springer P2PNA), 2019 (IF: 1.514, SJR: Q2)

L. Mo, A. Kritikakou, and S. He, “Energy-aware Multiple Mobile Chargers Coordination for Wireless Rechargeable Sensor Networks”, IEEE Journal of Internet of Things (IEEE JIOT), 2019 (IF: 5.863, SJR: Q1)

L. Mo, X. Cao, Y. Song and A. Kritikakou, “Distributed Node Coordination for Real-Time Energy-Constrained Control in Wireless Sensor and Actuator Networks”, IEEE Journal of Internet of Things (IEEE JIOT), 2018 (IF: 5.863, SJR: Q1)

L. Mo, A. Kritikakou and O. Sentieys, “Controllable QoS for Imprecise Computation Tasks on DVFS Multicores with Time and Energy Constraints”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems (IEEE JETCAS), 2018 (F: 3.218, SJR: Q1)

L. Mo, A. Kritikakou and O. Sentieys, “Energy-Quality-Time Optimized Task Mapping for DVFS-enabled Real-Time Multicore”, IEEE Transaction on Computer Aided Design (IEEE TCAD), 2018 (IF: 2.089, SJR: Q2)

A. Kritikakou, T. Marty and M. Roy, “DYNASCORE: DYNAmic Software COntroller to Increase REsource Utilization in Mixed-Critical Systems”, ACM Trans. Design Automation of Electronic Systems (ACM TODAES), Vol. 23, Issue 2, Jan., 2018 (IF: 0.870, SJR: Q2)

A. Kritikakou, F. Catthoor, V. Kelefouras and C. Goutis, “Array Size Computation under Uniform Overlapping & Irregular Accesses”, ACM Trans. Design Automation of Electronic Systems (ACM TODAES), Jan, 2016 (IF: 0.850, SJR: Q3)

V. Kelefouras, A. Kritikakou, I. Mporas and V. Kolonias, “A High Performance Matrix-Matrix Multiplication Methodology for CPU and GPU Architectures”, Journal of Supercomputing (JS), Springer, Jan, 2016 (IF: 1.326, SJR: Q2)

V.I. Kelefouras, E. Papadima, A. Kritikakou and C.E. Goutis, “A Methodology for Speeding up Matrix Vector Multiplication for single/multi-core architectures”, Journal of Supercomputing (JS), Springer, Mar, 2015

V.I. Kelefouras, A. Kritikakou and C.E. Goutis, “A Methodology for Speeding up Loop Kernels by Exploiting the Software Information and the Memory Architecture”, Journal of Computer Languages, Systems and Structure (COMLAN), Feb, 2015 (IF: 0.556, SJR: Q3)

V.I. Kelefouras, A. Kritikakou and C.E. Goutis, “A Matrix Matrix Multiplication Methodology for single/multi-core architectures using SIMD”, Journal of Supercomputing (JS), Springer, Jan, 2014 (IF: 0.917, SJR: Q2)

A. Kritikakou, F. Catthoor, V. Kelefouras and C. Goutis, “A Scalable & Near-optimal Representation of Access Schemes for Memory Management”, ACM Trans. Architecture and Code Optimization (ACM TACO), Vol. 11, No. 1, Feb, 2014 (IF: 0.824, SJR: Q2)

A. Kritikakou, F. Catthoor, V. Kelefouras and C. Goutis, “A Systematic Approach to Classify Design Time Global Scheduling Techniques”, ACM Computing Surveys (ACM CS), 2013, Vol. 45, No. 2 (IF: 4.043, SJR: Q1)

A. Kritikakou, F. Catthoor, G.S. Athanasiou, V. Kelefouras and C. Goutis, “Near-optimal Microprocessor & Accelerators Co-Design with Latency & Throughput Constraints”, ACM Trans. Architecture and Code Optimization (ACM TACO), Vol.10, No.2, May, 2013 (IF: 0.597, SJR: Q3)

V.I. Kelefouras, A. Kritikakou, C.E. Goutis and Costas Siourounis, “A Methodology for speeding up MVM for regular, Toeplitz and Bisymmetric Toeplitz matrices”, Journal of Signal Processing Systems (JSPS), Springer, 2013, pp. 1-15 (IF: 0.564, SJR: Q3)

V.I. Kelefouras, A. Kritikakou, and C.E. Goutis, “A Methodology for Speeding Up Edge and Line Detection Algorithms focusing on Memory Architecture Utilization”, Journal of Supercomputing (JS), Springer, Dec, 2013 (IF: 0.841, SJR: Q3)

A. Kritikakou, F. Catthoor, V. Kelefouras and C. Goutis, “Near-optimal & Scalable Intra-signal In-place for Non-overlapping & Irregular Access Scheme”, ACM Trans. Design Automation of Electronic Systems (ACM TODAES), Vo. 19, no. 1, Dec, 2013 (IF: 0.520, SJR: Q2)

N. Alachiotis, V. Kelefouras, G. Athanasiou, H. Michail, A. Kritikakou and C. Goutis, “A Data Locality Methodology for Matrix-Matrix Multiplication Algorithm”, Journal of Supercomputing (JS), Springer, 2012, Vol. 59, No. 2, pp. 830-851 (IF: 0.917, SJR: Q3)

V.I. Kelefouras, G.S. Athanasiou, N. Alachiotis, H. E. Michail, A. Kritikakou and C.E. Goutis, “A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization”, IEEE Transactions on Signal Processing (IEEE TSP), 2011, Vol.59, No. 12, pp. 6217-6226

R.P. Nikiema, A. Kritikakou, M. Traiola and O. Sentieys, “Impact of transient faults on timing behavior and mitigation with near-zero WCET overhead”, Euromicro Conference on Real-Time Systems (ECRTS), Vienna, 2023 (Qualis: A2, Core: A)

R.P. Nikiema, A. Kritikakou, M. Traiola and O. Sentieys, “Design with low complexity fine-grained Dual CoreLock-Step (DCLS) RISC-V processors”, IEEE/IFIP International Conference on Dependable Systems and Networks supplementary material (DSN-S), 2023 (Qualis: A1)

M. Traiola, A. Kritikakou, and O. Sentieys, “A machine-learning-guided framework for fault-tolerant DNNs”, Extended abstract, Design, Automation & Test in Europe (DATE), 2023 (Qualis: A1)

M. Traiola, A. Kritikakou, and O. Sentieys, “harDNNing: a machine-learning-based framework for fault tolerance assessment and protection of DNNs”, IEEE European Test Symposium (ETS), 2023 (Qualis: B2)

I . Krayem, R. Mercier, C. Killian, A. Kritikakou and D. Chillet, “Data and Fault Aware Routing Algorithm for NoC Based Approximate Computing”, ACM Symposium on Nanoscale Architectures (NANOARCH), 2022 (Qualis: B4)

A. Kritikakou, P. Nikolaou, I. Rodriguez-Ferrandez, J. Paturel, L. Kosmidis, M.K. Michael, O. Sentieys, D. Steenari, “Functional and Timing Implications of Transient Faults in Critical Systems”, IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), 2022 (Qualis: B1)

F.F. dos Santos, A. Kritikakou, and O. Sentieys, “Experimental evaluation of neutron-induced errors on a multicore RISC-V platform”, IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), 2021 (Qualis: B1)

A. Kritikakou, O. Sentieys, G. Hubert, Y. Helen, J.F. Coulon, and P. Deroux-Dauphin, “FLODAM: Cross-layer fault-tolerant reliability analysis flow for complex hardware designs”, Design, Automation & Test in Europe (DATE), 2022 (Qualis: A1)

L. Mo, Q. Zhou, A. Kritikakou, and J. Liu, “Energy Efficient, Real-time and Reliable Task Deployment on NoC-based Multicores with DVFS”, Design, Automation & Test in Europe (DATE), 2022 (Qualis: A1)

R. Mercier, C. Killian, A. Kritikakou, Y. Helen and D. Chillet, “A Region-Based Bit-Shuffling Approach Trading Hardware Cost and Fault Mitigation Efficiency”, IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2021, Virtual conference (Qualis: DFT)

M. Cui, A. Kritikakou, L. Mo, and E. Casseau, “Fault-Tolerant Mapping of Real-Time Parallel Applications under multiple DVFS schemes”, IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS),18-21 May, 2021, Virtual conference (Qualis: A2, Core: A)

R. Mercier, C. Killien, A. Kritikakou, Y. Helen, and D. Chillet, “Multiple Permanent Faults Mitigation through Bit-Shuffling for Network-on-Chip Architecture”, International Conference on Computer Design (ICCD), 2020 (Qualis: A2)

S. Skalistis and A. Kritikakou, “Dynamic interference-sensitive run-time adaptation of Time-Triggered schedules”, Euromicro Conference on Real-Time Systems (ECRTS), 2020 (Qualis: A2, Core: A)

J. Paturel, A. Kritikakou, and O. Sentieys, “Fast Cross-Layer Vulnerability Analysis of Complex Hardware Designs”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 6-8 July, 2020, Limassol, Cyprus (Qualis: B1)

M. Cui, L. Mo, A. Kritikakou, and E. Casseau, “Energy-aware Partial-Duplication Task Mapping under Real-Time and Reliability Constraints”, International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), 5-9 July, 2020, Samos, Greece (Qualis: B2)

S. Skalistis and A. Kritikakou, “Timely Fine-grained interference-sensitive run-time adaptation of time-triggered schedules”, IEEE Real-Time Systems Symposium (RTSS), 2019 (Qualis: A1, Core: A*)

R. Psiakis, A. Kritikakou and O. Sentieys, “Fine-grained Hardware Mitigation for Multiple Long-Duration Transients on VLIW Function Units”, Design, Automation & Test in Europe (DATE), 25-29 March, 2019, Florence, Italy (Qualis: A1)

L. Mo, A. Kritikakou and O. Sentieys, “Approximation-aware Task Deployment on Asymmetric Multicore Processors”, Design, Automation & Test in Europe (DATE), 25-29 March, 2019, Florence, Italy (Qualis: A1)

R.Psiakis, A. Kritikakou, E. Casseau and O. Sentieys, “Run-Time Coarse-Grained Hardware Mitigation for Multiple Faults on VLIW Processors”, Conference on Design and Architectures for Signal and Image Processing (DASIP), 16-18 October, 2019, Montreal, Canada

L. Mo, A. Kritikakou, X. Cao, “Collaborative State Estimation and Actuator Scheduling for Cyber-Physical Systems under Random Multiple Events”, International Conference on Ad Hoc Networks and Wireless (AdHoc-Now), 5-7 September, 2018, St-Malo, France (Qualis: B1, Core: B)

S. Derrien, I. Puaut, P. Alefragis, M. Bednaraz, H. Bucherx, C. David, Y. Debray, U. Durak,I. Fassi, C. Ferdinand, D. Hardy, A. Kritikakou, G. Rauwerda, S. Reder, M. Sicks„ T. Stripf, K. Sunesen, T. Braak, N. Voros, J. Becker, “WCET-Aware Parallelization of Model-Based Applications for Multi-Cores: the ARGO Approach”, Design, Automation & Test in Europe (DATE), 27-31 March 2017, Lausanne, Swiss (Qualis: A1)

R.Psiakis, A. Kritikakou, and O. Sentieys, “NEDA: NOP Exploitation with Dependency Awareness for Reliable VLIW Processors”, Computer Society Annual Symposium on VLSI (ISVLSI), July 3-5, 2017, Bochum, Germany (Qualis: B1)

R.Psiakis, A. Kritikakou, and O. Sentieys, “Run-Time Instruction Replication for Permanent and Soft Error Mitigation in VLIW Processors”, International New Circuits and Systems Conference (NEWCAS), 25-28 June, 2017 Strasbourg, France (Qualis: B4)

L. Mo, A. Kritikakou, and O. Sentieys, “Decomposed Task Mapping to Maximize QoS in Energy-Constrained Real-Time Multicores”, International Conference on Computer Design (ICCD), 5-8 November, 2017, Massachusetts, USA (Qualis: A2)

A. Kritikakou, T. Marty, C. Pagetti, C. Rochange, Michael Lauer and M. Roy, “Multiplexing Adaptive with Classic AUTOSAR? Adaptive Software Control to Increase Resource Utilization in Mixed-Critical Systems”, Critical Automotive applications: Robustness & Safety (CARS), Sep 2016, Göteborg, Sweden

A. Kritikakou, O. Baldellon, C. Pagetti, C. Rochange and M. Roy, “Run-time Control to Increase Task Parallelism in Mixed-Critical Workloads”,  Euromicro Conference on Real-Time Systems (ECRTS), 8-11 July 2014, Madrid, Spain (Qualis: A2, Core: A)

A. Kritikakou, C. Pagetti, C. Rochange, M. Roy, Madeleine Faugère, Sylvain Girbal and Daniel Gracia Pérez, “Distributed run-time WCET controller for concurrent critical tasks in mixed-critical systems”, International Conference on Real-Time Networks and Systems (RTNS), 8-10 October, 2014, Versailles, France

D. Tsitsipis, S.M. Dima, A. Kritikakou, C. Panagiotou, and S.Koubias, “Segmentation and Reassembly Data Merge (SaRDaM) Technique for Wireless Sensor Networks”, International International on Industrial Technology (ICIT), 19-21 Mar 2012, Athens, Greece (Qualis: B3)

A. Kritikakou, F.Catthoor, G.S. Athanasiou, V. Kelefouras and C. Goutis, “A Template-based Methodology for Efficient Microprocessor and FPGA Accelerator Co-Design”, International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), 16-19 July 2012, Samos, Greece (Qualis: B2)

D. Tsitsipis, S.M. Dima, A. Kritikakou, C. Panagiotou, J. Gialelis, H. Michail and S. Koubias, “Priority Handling Aggregation Technique (PHAT) for Wireless Sensor Networks”, International Conference Emerging Technologies and Factory Automation (ETFA),17-21 Sep 2012, Cracow, Poland (Qualis: B1)

D. Tsitsipis, S.M. Dima, A. Kritikakou, C. Panagiotou, and S. Koubias, “Data Merge: A data aggregation technique for Wireless Sensor Networks”, Proc. International Conference Emerging Technologies and Factory Automation (ETFA), 5-9 Sep 2011, Toulouse, France (Qualis: B1)

D. Novo, A. Kritikakou, P. Raghavan, V.P. Liesbet, H. Jos and F. Catthoor, “Ultra Low Energy Domain Specific Instruction-set Processor for On-line Surveillance”, IEEE Symposium on Application Specific Processors (SASP), 13-14 June 2010, Anaheim, CA, USA (Qualis: B4)

H. Michail, A. Gregoriades, V. Papadopoulou, G. Athanasiou, A. Kritikakou and C. Goutis, “Ultra high speed SHA-256 hashing cryptographic module for IPSec hardware/software codesign”, International Conference on Security and Cryptography (SE-CRYPT), 26-28 July 2010, Athens, Greece. (Qualis: B4, Core: B)

A. Kritikakou, and S. Skalistis, “Progress-aware dynamic slack exploitation in mixed-critical systems”, WiP in Proc. International Conference on Embedded Software (EMSOFT), 20-25 Sep 2020, Virtual Conference

A. Kritikakou, O. Baldellon, C. Pagetti, C. Rochange, M. Roy, and F. Vargas, “Monitoring On-line Timing Information to Support Mixed-Critical Workloads”, WiP in Proc. International Conference Real-Time Systems Symposium (RTSS), 3-6 Dec 2013, Vancouver, Canada (Qualis: A1, Core: A*)