Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems


CEA, LIST

ALCHEMY Workshop 2015
Held in conjunction with the International Conference on Computational Science (ICCS 2015)
Reykjavik, Iceland, 1-3 June 2015


   The International Conference on Computational Science is an annual
    conference that brings together researchers and scientists from mathematics
    and computer science as basic computing disciplines, researchers from various
    application areas who are pioneering computational methods in sciences such
    as physics, chemistry, life sciences, and engineering, as well as in arts and
    humanitarian fields, to discuss problems and solutions in the area, to identify new
    issues, and to shape future directions for research.


http://www.iccs-meeting.org/iccs2015/


Program


Alchemy is scheduled in the ICCS conference program on the 1st of June.
Note to speakers: there is a 20-minute slot for each presentation (questions included), for both regular and short papers.

Keynote

Raymond NAMYST, Université de Bordeaux, France

Raymond Namyst received his PhD from the University of Lille in
1997. He was lecturer at Ecole Normale Superieure de Lyon from 1998 to
2001. He became a full Professor position at University of Bordeaux in
september 2002.

These last ten years, he has been the scientific leader of the Runtime
Inria Research Group, devoted to the design of high performance runtime systems for parallel
architectures. His main research interests are parallel computing,
scheduling on heterogeneous multiprocessor architectures (multicore,
NUMA, accelerators), and communications over high speed networks. He
has contributed to the development of many significant runtime systems
(MPI, OpenMP) and most notably the StarPU software
(http://runtime.bordeaux.inria.fr/StarPU/).

He has been member of numerous conference program
committees. He was the co-chair of the Euro-Par 2011 international
conference, and has served as a topic chair for SC'11 and Euro-Par'14.
He has been involved in several European Exascale activities,
including the European Exascale Software Initiative (EESI) for which
he was coordinator of the Runtime System roadmap, and the European
Technology Platform for High Performance Computing (ETP4HPC).


Programming heterogeneous, manycore machines: a runtime system's perspective

Heterogeneous manycore parallel machines, mixing multicore CPUs with manycore accelerators provide
an unprecedented amount of processing power per node. Dealing with such a large number of
heterogeneous processing units -- providing a highly unbalanced computing power -- is one of the biggest
challenge that developpers of HPC applications have to face. To Fully tap into the potential of these
heterogeneous machines, pure offloading approaches, that consist in running an application on host cores
while offloading part of the code on accelerators, are not sufficient.

In this talk, I will go through the major software techniques that were specifically designed to harness
heterogeneous architectures, focusing on runtime systems. I will discuss some of the most critical issues
programmers have to consider to achieve portability of performance, and how programming languages may
evolve to meet such as goal.

Eventually, I will give some insights about the main challenges designers of programming environments will
have to face in upcoming years.


Proceedings

Full papers (ICCS Procedia Computer Science proceedings, oral presentation)

Prefetching Challenges in Distributed Memories for CMPs
Marti Torrents, Raul Martínez and Carlos Molina

Retargeting of the Open Community Runtime to Intel Xeon Phi
Jiri Dokulil and Siegfried Benkner

A short overview of executing Γ Chemical Reactions over the ΣC and τC Dataflow Programming Models
Loïc Cudennec and Thierry Goubier

Execution Trace Graph Based Multi-Criteria Partitioning of Stream Programs
Malgorzata Michalska, Simone Casale-Brunet, Endri Bezati and Marco Mattavelli

On the Use of a Many-core Processor for Computational Fluid Dynamics Simulations
Sebastian Raase and Tomas Nordström

Threaded MPI Programming Model for the Epiphany RISC Array Processor
David Richie, James Ross, Song Park and Dale Shires

An Empirical Evaluation of a Programming Model for Context-Dependent Real-time Streaming Applications
Xuan Khanh Do, Stephane Louise and Albert Cohen

A case study on using proto-application as a proxy for code modernization
Nathalie Möller, Eric Petit, Loïc Thébault and Quang Dinh

Short papers (Online proceedings, oral presentation and conference poster)

Performance prediction for Heterogeneous Manycores
Nicolas Benoit and Stephane Louise

A Methodology for Profiling and Partitioning Stream Programs on Many-core Architectures
Malgorzata Michalska, Jani Boutellier and Marco Mattavelli

Towards an automatic co-generator for manycores’ architecture and runtime: STHORM case-study
Charly Bechara, Karim Ben Chehida and Farhat Thabet

Call for papers

(also on WikiCFP)


   Massively parallel processors have entered high performance computing
    architectures, as well as embedded systems. In June 2014, the TOP500
    number one system (Tianhe-2) features the 57-core Intel Xeon Phi
    processor. The increase of the number of cores on a chip is expected
    to rise in the next years, as shown by the ITRS trends: other examples
    include the Kalray MPPA 256-core chip, the 63-core Tilera GX processor
    and even the crowd-funded 64-core Parallella Epiphany chip. In this
    context, developers of parallel applications, including heavy
    simulations and scientific calculations will undoubtedly have to cope
    with many-core processors at the early design steps.

   In the two past sessions of the Alchemy workshop, held together with
    the ICCS meeting, we have presented significant contributions on the
    design of many-core processors, both in the hardware and the software
    programming environment sides, as well as some industrial-grade
    application case studies. In this 2015 session, we seek academic
    and industrial works that contribute to the design and the
    programmability of many-core processors.

Topics

    Topics include, but are not limited to:
    * Programming models and languages for many-cores
    * Compilers for programming languages
    * Runtime generation for parallel programming on manycores
    * Architecture support for massive parallelism management
    * Enhanced communications for CMP/manycores
    * Shared memory, data consistency models and protocols
    * New operating systems, or dedicated OS
    * Security, crypto systems for manycores
    * User feedback on existing manycore architectures
      (experiments with Adapteva Epiphany, Intel Phi, Kalray MPPA, ST
    STHorm, Tilera Gx, TSAR..etc)
 

Submission

 This yea
Procedia Computer Science
r, there will be two formats for the presentation at the
    workshop. The usual full-length paper is 10 pages according to the ICCS
    format, and the short-paper format well fitted for works in progress,
    with a maximum of 2 pages. The accepted papers for full-length paper
    will be published alongside with the ICCS proceedings in Procedia
    Computer Science
, whereas the short-papers will be presentation and
    poster only at the conference (with proceedings and presentations
    available from the workshop website).

 The manuscripts of up to 10 pages, written in English and formatted according to
    the EasyChair templates, should be submitted electronically.
    Templates are available for download in the Easychair right-hand-side menu
    in a “New submission” mode.
Microsoft Word template, docx format
LaTeX template


Important dates

Submission deadline extended to January 31 (firm).

Other important dates are synchronized with the ICCS meeting.

Program Committee

Akram BEN AHMED, University of Aizu, Fukushima, Japan
Jeronimo CASTRILLON, CFAED / TU Dresden, Germany
Camille COTI, Université de Paris-Nord, France
Loïc CUDENNEC, CEA, LIST, France
Stephan DIESTELHORST, ARM Ltd; Cambridge, UK
Aleksandar DRAGOJEVIC, Microsoft Research Cambridge, UK
Daniel ETIEMBLE, Université de Paris-Sud, France
José FLICH CARDO, Universidad Politécnica de Valencia, Spain
Bernard GOOSSENS, Université de Perpignan, France
Vincent GRAMOLI, NICTA / University of Sydney, Australia
Jorn W. JANNECK, Lund University, Sweden
Sven KAROL, TU Dresden, Germany
Vianney LAPOTRE, Université de Bretagne-Sud, France
Eric LENORMAND, Thales TRT, France
Stéphane LOUISE, CEA, LIST, France
Vania MARANGOZOVA-MARTIN, Université Joseph-Fourier Grenoble, France
Marco MATTAVELLI, École Polytechnique Fédérale de Lausanne (EPFL), Switzerland
Maximilian ODENDAHL, Silexica / RWTH Aachen University, Germany
Eric PETIT, Université de Versailles Saint Quentin-en-Yvelines, France
Erwan PIRIOU, CEA, LIST, France
Antoniu POP, University of Manchester, UK
Mickaël RAULET, ATEME Rennes, France
Jason RIEDY, Georgia Institute of Technology, USA
Etienne RIVIERE, Université de Neuchâtel, Switzerland
Thomas ROPARS, École Polytechnique Fédérale de Lausanne (EPFL), Switzerland
Martha Johanna SEPULVEDA, INRIA, École Centrale de Lyon, France
Osamu TATEBE, AIST / University of Tsukuba, Japan

Sub-review

Safae DAHMANI, CEA, LIST, France
Oana STAN, CEA, LIST, France

Organization

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