Overview

This course covers the fundamentals of the ASIC design process. The topics include ASIC design flow, basic HDL constructs, modeling combinational & synchronous logic, modeling finite state machines, multiple clock domain designs, delay and timing analysis, and qualitative design issues.

Topics Covered: ASIC design flow, Basic HDL constructs, Concurrent and Sequential HDL features. Modeling Sequential Circuits by Finite State machines, Different finite state machine models, state encoding, RTL coding, LFSR and FIFO. Logic Synthesis. Static Timing Analysis Timing constraints, static timing analysis, Timing and Synchronization, Metastability, synchronization, multiple clock domain, Design for Testability, Design Validation.

Course structure:

• Lectures

• Homework

• Exams (midterm, final)

• Projects

Project structure:

• EDA tools from Mentor Graphics and Synopsys are used for simulation and synthesis

Formal course description:

https://www.pdx.edu/electrical-computer-engineering/ece-4581-asic-modeling-and-synthesis

Required TA Skills

1. Be very competent and confident with designing, entering, simulating, and synthesizing by using EDA design tools.

2. Be very competent and able to explain logic designs.

3. Know and be able to explain SystemVerilog modeling and simulation of digital systems.

4. Be very comfortable working with and helping students. The command of the English language must be good enough so that there are not communication issues when providing students with help.

TA Responsibilities

1. Give an introduction to the project, clarifying instructions and highlighting any important information students need to know.

2. Help students during each project, answering questions and checking each group’s progress.

3. Grade their submitted project reports in a timely manner and upload student scores and feedback to D2L.

4. Be available for an office hour outside of project time; be responsive to student email questions.

5. Be in contact with the instructor and keep them informed of any problems in the project.

6. There may be other responsibilities depending on the instructor such as holding exam review sessions, proctoring or grading exams, or other assistance to the instructor if requested.