Embedded Files
Research Area
Research Area
High-Speed Link Circuits and Systems
6G Digital Processor for Massive-MIMO
In-Memory Computing Macro / ML Hardware Accelerator
Automation Methodologies for Analog/Mixed-Signal (AMS) Circuits
Research Goal: Developing Integrated AI Hardware Solutions Spanning from Data Center to Edge
In-Memory-Computing Simulator
In-Memory-Computing Simulator
A event-driven IMC (In-Memory-Computing) based NPU (Neural Processing Unit) simulator that enables fast verification while supporting integrated simulation with peripheral digital circuits and reflecting various non-idealities.
Distributed Direction-of-Arrival (DOA) Estimation Processor
Distributed Direction-of-Arrival (DOA) Estimation Processor
A distributed DOA estimation Processor for massive MIMO (Multiple Input Multiple Output) systems.
DSP-based Receiver
DSP-based Receiver
A linear filter architecture that eliminates the feedback bottleneck by adopting a pure feed-forward structure to achieve high-speed operation, enabling high-performance Inter-Symbol Interference (ISI) cancellation for high-speed continuous data streams.Â
Report abuse