Call for Papers

The IEEE/SBC 36th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2024) will take place from November 13 to 15, at the Hilo Hawaiian Hotel in Hawaii, USA.

SBAC-PAD is an annual international conference series, which presents the latest trends, current research and developments, and novel tools and applications in the fields of Computer Architecture, High-Performance Computing, and Parallel and Distributed Computing technologies. SBAC-PAD is open to industry, faculty, researchers, practitioners, and undergraduate and graduate students from around the world. Its scientific program is composed of high-quality submitted papers, selected by a thorough peer review process, and invited talks from renowned researchers.

Paper submission deadline July 23, 2024 AoE

Rebuttal period August 26 — August 28, 2024

Author notification September 09, 2024

Camera-ready submission September 30, 2024

The program committee will select the top-ranked papers as finalists, and one paper will be selected during the conference as the Best Paper. Selected papers will also be invited to submit an extended version to a special issue of the Journal of Parallel and Distributed Computing.

Authors are invited to submit original manuscripts to one of five tracks that address challenges in any of the following areas related to the fields of Computer Architecture (CA) and High-performance and Distributed Computing (HPDC). Topics of interest include (but are not limited to):

• Application-specific systems;

• Architecture and programming support for emerging domains: Big Data, Deep Learning, Machine learning, Cognitive Systems;

• Artificial intelligence and machine learning methods for CA and HPDC, and CA and HPDC for Artificial intelligence applications;

• Benchmarking, performance modeling, analysis, and evaluation;

• Blockchain and distributed ledgers;

• Cloud, cluster, and edge/fog computing systems;

• Data-intensive workloads and tools;

• Data management, storage, and I/O;

• Embedded and pervasive systems;

• GPUs, FPGAs, and accelerator architectures;

• Languages, compilers, and tools for parallel and distributed programming;

• Modeling and simulation methodologies;

• Operating systems and virtualization;

• Parallel and distributed systems, algorithms, models, and applications;

• Power and energy-efficient systems;

• Predictive models to improve performance of scientific applications

• Processing-in-memory or near-data processing technologies

• Processor, cache, memory, storage, and network architecture;

• Quantum computing in CA and HPDC;

• Real-world applications and case studies;

• Reconfigurable, resilient, and fault-tolerant systems;

• Security and privacy in CA and HPDC;

• Workflow systems.

Papers submitted to SBAC-PAD 2024 must present original research results and must not have been published or concurrently be submitted anywhere else. Submissions should be made using the submission link: https://jems3.sbc.org.br/sbac-pad2024 .

Once at the jems3 site, click on one of the following sub-events links:

−  SBAC-PAD-CA 2024 - Computer Architecture Track

−  SBAC-PAD-DSNS 2024 - Distributed Systems, Networking, and Storage Track

−  SBAC-PAD-PAA 2024 - Parallel Applications and Algorithms Track

−  SBAC-PAD-PE 2024 - Performance Evaluation Track

−  SBAC-PAD-SS 2024 - System Software Track

Paper submissions must be in English, have 10 pages maximum (excluding the references), and follow the IEEE conference manuscript formatting guidelines for double-column text using a single-spaced 10-point font on 8.5 × 11-inch pages. Templates are available from http://www.ieee.org/conferences/publishing/templates.html. Papers that do not meet these requirements might be rejected without a review. To be published in the conference proceedings and to be eligible for publication at the IEEE Xplore, one of the authors must register at the full rate and present his/her work at the conference.

The SBAC-PAD 2024 submissions will undergo a double-anonymized review process, where reviewers will not know the authors' identities, and vice-versa. Therefore, authors should “anonymize” their submission by adopting the following guidelines, otherwise papers will be rejected without review:

• The authors cannot include their names, affiliations, funding sources, or acknowledgments in any part of the for-review version of their paper;

• Self-references that are relevant to the work are allowed, but they should not appear in the text in the first person. Instead, they should be referenced in the third person, like “Smith et al. found that… [4].”, and;

• For the authors' own unpublished work, they need to use anonymous citations.

Gerald F. Lofstead (Sandia National Laboratories, USA)

Alfredo Goldman (University of Sao Paulo, Brazil)

Carla Osthoff (National Laboratory for Scientific Computing, Brazil)

J. Nelson Amaral (University of Alberta, Canada)

Computer Architecture: Marco Zanata Alves (Universidade Federal do Parana, Brazil)

Distributed Systems, Networking, and Storage: Lucas M. Schnorr (Universidade Federal do Rio Grande do Sul, Brazil)

Parallel Applications and Algorithms: Rosa M. Badia (Barcelona SuperComputing Centre, Spain)

Performance Evaluation: Marcos Assuncao (Ecole de Technologie Supérieure, Montreal)

System Software: Vinod Rebello (Universidade Federal Fluminense, Brazil)