Research Scholar (Ph.D. Student)
Indian Institute of Technology Ropar, Punjab, India
Current Residence: Vienna, Austria (RWR+)
Aktueller Wohnsitz: Wien, Österreich (RWR+)
I am a research scholar at the Department of Electrical Engineering🔗, Indian Institute of Technology (IIT) Ropar🔗, under the guidance of Dr. Devarshi M. Das🔗. My research focuses on enhancing the Electromagnetic Interference (EMI) immunity of Operational Amplifiers (OpAmps) and Instrumentation Amplifiers at the circuit level.
I am currently based in Vienna, Austria.
My academic journey began at Jawahar Navodaya Vidyalaya, followed by a B.Tech in Electronics Engineering. I pursued M.Tech in VLSI Design at the Indian Institute of Engineering Science and Technology (IIEST) Shibpur, under the guidance of Dr. Sudip Ghosh🔗 and Prof. Hafizur Rahaman🔗. My master’s work has been presented at international IEEE conferences. My interests include CMOS circuit design, physical design, and memristive circuits. Beyond my research, I like to learn from and assist others with their technical needs.
Ongoing work
EMI-immune CMOS amplifier design
EMI-immune OTA and three OpAmp INA design
EMI-susceptibility of crossbar-based neuromorphic circuits
Previous work
Neuromorphic circuit
Embedded system and PCB prototyping
Digital image watermarking
Skills
CMOS amplifiers, Analog IC design
Semi-custom & full-custom physical design 🔗
Application-specific HW architecture design
Algorithm to RTL design
PCB design 🔗 & FPGA prototyping
Memristor, Memristive circuits
Tools I've worked with
IC design toolchain: Cadence Virtuoso, Assura, and Siemens Calibre;
PCB design with EasyEDA tools, and soldering;
Linux-based OS i.e. Centos, Redhat, Ubuntu; Windows;
Xilinx ISE, Vivado, Zenus & Innovus of Cadence;
Other: Verilog, MATLAB;
Journals
Shivdeep, S. Sharma, M. Sakare and D. M. Das, "Mitigating EMI Susceptibility in Three OpAmp INA With a High CMRR EMI Immune OTA," in IEEE Transactions on Electromagnetic Compatibility, doi: 10.1109/TEMC.2026.3677893.
Shivdeep, S. Boyapati and D. M. Das, “Impact of EMI on the Reliability of Crossbar Architecture-based Inference in CMOS Technology," in IEEE Transactions on Components, Packaging and Manufacturing Technology, doi: 10.1109/TCPMT.2025.3559486.
S. K. Vohra, S. A. Thomas, Shivdeep, M. Sakare and D. M. Das, “Full CMOS Circuit for Brain-Inspired Associative Memory with On-Chip Trainable Memristive STDP Synapse,” in IEEE Transactions on Very Large Scale Integration (TVLSI) Systems, doi: 10.1109/TVLSI.2023.3268173.
Conference papers
Shivdeep, S. Sharma, S. Boyapati and D. M. Das, “A Two Stage Miller OpAmp with Low Voltage Cascode Current Source with High EMI Immunity," 2023 International Symposium on Electromagnetic Compatibility – EMC Europe, Krakow, Poland, 2023, pp. 1-6, doi: 10.1109/EMCEurope57790.2023.10274391.
S. Sharma, Shivdeep, N. Sharma and D. M. Das, “A 0.006 mm2 Low Input Capacitance Low Power Fully Differential Neural Amplifier,” 2024 31st International Conference on Mixed Design of Integrated Circuits and System (MIXDES), Gdansk, Poland, 2024, pp. 50-54, doi: 10.23919/MIXDES62605.2024.10613933.
A. Y. N J, Shivdeep, S. Sharma, H. Shrimali and D. M. Das, “A 66dBΩ 5 GHz and 44.88 √Hz/(pA·pW) Inductorless TIA in 65 nm CMOS,” 2024 31st International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES), Gdansk, Poland, 2024, pp. 55-60, doi: 10.23919/MIXDES62605.2024.10613986.
D. Chowdhury, Shivdeep, and D. M. Das, “A Pulse Oximeter and a Controller Designed for Automatic Regulation of Oxygen Concentrators,” 2024 37th International Conference on VLSI Design (VLSID), Kolkata, India, 2024, pp. 336-341, doi: 10.1109/VLSID60093.2024.00062.
S. Chittoriya, Shivdeep, K. K. Jha, D. M. Das and R. Sharma, “A Low-Overhead PUF Based Hardware Security Technique to Prevent Scan Chain Attacks for Industry-Standard DFT Architecture,” 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS), Fukuoka, Japan, 2022, pp. 1-4, doi: 10.1109/MWSCAS54063.2022.9859268.
Shivdeep, S. K. Vohra, N. Goel and D. M. Das, “A Robust Training Signal Generator for Trainable Memristive Digital to Analog Converter,” 2021 IEEE International Symposium on Smart Electronic Systems (iSES), Jaipur, India, 2021, pp. 1-5, doi: 10.1109/iSES52644.2021.00014.
Shivdeep, S. Ghosh and H. Rahaman, “A New Digital Color Image Watermarking Algorithm with its FPGA and ASIC Implementation,” 2020 International Symposium on Devices, Circuits and Systems (ISDCS), Howrah, India, 2020, pp. 1-6, doi: 10.1109/ISDCS49393.2020.9263003.
Shivdeep, S. Ghosh, T. Nag, S. P. Maity and H. Rahaman, “Reversible Color Image Watermarking Algorithm using Reverse Contrast Mapping,” 2020 IEEE 1st International Conference for Convergence in Engineering (ICCE), Kolkata, India, 2020, pp. 444-447, doi: 10.1109/ICCE50343.2020.9290684.
Shivdeep, S. Ghosh, P. Ghosal, S. P. Maity and H. Rahaman, “PEE Based Reversible Watermarking Algorithm for Authentication and Security of Medical Images,” 2020 IEEE Region 10 Symposium (TENSYMP), Dhaka, Bangladesh, 2020, pp. 1620-1623, doi: 10.1109/TENSYMP50017.2020.9230851.
Shivdeep, A. Biswas, S. Ghosh, T. Nag, S. P. Maity and H. Rahaman, “HLS Based Implementation of Modified DE-RIW Algorithm on FPGA and P-SoC,” 2020 IEEE 1st International Conference for Convergence in Engineering (ICCE), Kolkata, India, 2020, pp. 439-443, doi: 10.1109/ICCE50343.2020.9290711.
Patent
Indian Patent Application No. 202511026465, "A crossbar interfacing circuit immune to electromagnetic interference (EMI)", Shivdeep, S. Sharma, D. M. Das.
Ph.D. (Analog IC Design) Indian Institute of Technology Ropar, Punjab, India (2020 - ongoing)
M.Tech (VLSI Design) IIEST Shibpur, West Bengal, India (2018 - 2020)🔗
B.Tech (ECE) Dr. A.P.J. A. K. Technical University, Lucknow, UP, India (2012 - 2016)
Schooling Jawahar Navodaya Vidyalaya (JNV) Auraiya, UP, India (2005 - 2012)
CMOS Analog IC Design
Circuit Simulation Lab
Digital IC Design
Low Power Design
Mixed Signal IC Design
Broadband Communications Circuit Design
Semiconductor Device Physics and Modeling
Circuit Simulation Lab
Analog Circuits Lab
Basic Electronics Lab
Principles of Electrical Engineering Lab 🔗